[wasm-simd] Prototype prefetch for ia32

Bug: v8:11168
Change-Id: I6f697363d6f6d9b6a2303dec848f6d5200613f0a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2641198
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#72240}

src/compiler/backend/ia32/code-generator-ia32.cc

@@ -4288,6 +4288,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       ASSEMBLE_SIMD_ALL_TRUE(pcmpeqb);
       break;
     }
+    case kIA32Prefetch:
+      __ prefetch(i.MemoryOperand(), 1);
+      break;
+    case kIA32PrefetchNta:
+      __ prefetch(i.MemoryOperand(), 0);
+      break;
     case kIA32Word32AtomicPairLoad: {
       XMMRegister tmp = i.ToDoubleRegister(instr->TempAt(0));
       __ movq(tmp, i.MemoryOperand());

src/compiler/backend/ia32/instruction-codes-ia32.h

@@ -417,6 +417,8 @@ namespace compiler {
   V(IA32V32x4AllTrue)              \
   V(IA32V16x8AllTrue)              \
   V(IA32V8x16AllTrue)              \
+  V(IA32Prefetch)                  \
+  V(IA32PrefetchNta)               \
   V(IA32Word32AtomicPairLoad)      \
   V(IA32Word32AtomicPairStore)     \
   V(IA32Word32AtomicPairAdd)       \

src/compiler/backend/ia32/instruction-scheduler-ia32.cc

@@ -434,6 +434,8 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kIA32Poke:
     case kIA32MFence:
     case kIA32LFence:
+    case kIA32Prefetch:
+    case kIA32PrefetchNta:
       return kHasSideEffect;
 
     case kIA32Word32AtomicPairLoad:

src/compiler/backend/ia32/instruction-selector-ia32.cc

@@ -701,6 +701,36 @@ void InstructionSelector::VisitUnalignedLoad(Node* node) { UNREACHABLE(); }
 // Architecture supports unaligned access, therefore VisitStore is used instead
 void InstructionSelector::VisitUnalignedStore(Node* node) { UNREACHABLE(); }
 
+void InstructionSelector::VisitPrefetchTemporal(Node* node) {
+  IA32OperandGenerator g(this);
+  InstructionOperand inputs[3];
+  size_t input_count = 0;
+  InstructionCode opcode = kIA32Prefetch;
+  AddressingMode addressing_mode =
+      g.GetEffectiveAddressMemoryOperand(node, inputs, &input_count);
+  // The maximum number of inputs that can be generated by the function above is
+  // 3, but wasm cases only generate 2 inputs. This check will need to be
+  // modified for any non-wasm uses of prefetch.
+  DCHECK_LE(input_count, 2);
+  opcode |= AddressingModeField::encode(addressing_mode);
+  Emit(opcode, 0, nullptr, input_count, inputs);
+}
+
+void InstructionSelector::VisitPrefetchNonTemporal(Node* node) {
+  IA32OperandGenerator g(this);
+  InstructionOperand inputs[3];
+  size_t input_count = 0;
+  InstructionCode opcode = kIA32PrefetchNta;
+  AddressingMode addressing_mode =
+      g.GetEffectiveAddressMemoryOperand(node, inputs, &input_count);
+  // The maximum number of inputs that can be generated by the function above is
+  // 3, but wasm cases only generate 2 inputs. This check will need to be
+  // modified for any non-wasm uses of prefetch.
+  DCHECK_LE(input_count, 2);
+  opcode |= AddressingModeField::encode(addressing_mode);
+  Emit(opcode, 0, nullptr, input_count, inputs);
+}
+
 namespace {
 
 // Shared routine for multiple binary operations.

src/compiler/backend/instruction-selector.cc

@@ -2771,13 +2771,13 @@ void InstructionSelector::VisitI64x2UConvertI32x4High(Node* node) {
         // && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS64 &&
         // !V8_TARGET_ARCH_MIPS
 
-#if !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_X64
+#if !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32
 // TODO(v8:11168): Prototyping prefetch.
 void InstructionSelector::VisitPrefetchTemporal(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitPrefetchNonTemporal(Node* node) {
   UNIMPLEMENTED();
 }
-#endif  // !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_X64
+#endif  // !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_X64 || !V8_TARGET_ARCH_IA32
 
 #if !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_X64
 // TODO(v8:11002) Prototype i8x16.popcnt.

test/cctest/wasm/test-run-wasm-simd.cc

@@ -3805,7 +3805,7 @@ WASM_SIMD_TEST(SimdF32x4SetGlobal) {
   CHECK_EQ(GetScalar(global, 3), 65.0f);
 }
 
-#if V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64
+#if V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32
 // TODO(v8:11168): Prototyping prefetch.
 WASM_SIMD_TEST(SimdPrefetch) {
   FLAG_SCOPE(wasm_simd_post_mvp);
@@ -3857,7 +3857,7 @@ WASM_SIMD_TEST(SimdPrefetch) {
     }
   }
 }
-#endif  // V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64
+#endif  // V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32
 
 WASM_SIMD_TEST(SimdLoadStoreLoad) {
   WasmRunner<int32_t> r(execution_tier, lower_simd);