Commit 985db1a3 authored by bmeurer@chromium.org's avatar bmeurer@chromium.org

[x86] Several small performance improvements.

- Generate

    cmp reg, 0

  instead of

    test reg, -1

  for word tests.
- Generate

    mov reg, [stack slot]
    add reg, reg
    jo label

  instead of

    mov reg, [stack slot]
    add reg, [stack slot]
    jo label

  for SMI tagging.
- Improve materialization of int32 constants on X86-64.
- Branch fusion fix for Word64And and Int64Sub on X86-64.

R=dcarney@chromium.org

Review URL: https://codereview.chromium.org/651383003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24619 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent b26632f6
......@@ -259,7 +259,18 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
size_t output_count = 0;
// TODO(turbofan): match complex addressing modes.
if (g.CanBeImmediate(right)) {
if (left == right) {
// If both inputs refer to the same operand, enforce allocating a register
// for both of them to ensure that we don't end up generating code like
// this:
//
// mov eax, [ebp-0x10]
// add eax, [ebp-0x10]
// jo label
InstructionOperand* const input = g.UseRegister(left);
inputs[input_count++] = input;
inputs[input_count++] = input;
} else if (g.CanBeImmediate(right)) {
inputs[input_count++] = g.UseRegister(left);
inputs[input_count++] = g.UseImmediate(right);
} else {
......@@ -674,13 +685,6 @@ static inline void VisitWordCompare(InstructionSelector* selector, Node* node,
}
static void VisitWordTest(InstructionSelector* selector, Node* node,
FlagsContinuation* cont) {
IA32OperandGenerator g(selector);
VisitCompare(selector, kIA32Test, g.Use(node), g.TempImmediate(-1), cont);
}
// Shared routine for multiple float compare operations.
static void VisitFloat64Compare(InstructionSelector* selector, Node* node,
FlagsContinuation* cont) {
......@@ -694,7 +698,7 @@ static void VisitFloat64Compare(InstructionSelector* selector, Node* node,
void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
BasicBlock* fbranch) {
OperandGenerator g(this);
IA32OperandGenerator g(this);
Node* user = branch;
Node* value = branch->InputAt(0);
......@@ -780,7 +784,7 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
}
// Branch could not be combined with a compare, emit compare against 0.
VisitWordTest(this, value, &cont);
VisitCompare(this, kIA32Cmp, g.Use(value), g.TempImmediate(0), &cont);
}
......@@ -799,7 +803,6 @@ void InstructionSelector::VisitWord32Equal(Node* const node) {
default:
break;
}
return VisitWordTest(this, value, &cont);
}
}
return VisitWordCompare(this, node, kIA32Cmp, &cont, false);
......
......@@ -870,7 +870,7 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
switch (src.type()) {
case Constant::kInt32:
// TODO(dcarney): don't need scratch in this case.
__ movq(dst, Immediate(src.ToInt32()));
__ Set(dst, src.ToInt32());
break;
case Constant::kInt64:
__ Set(dst, src.ToInt64());
......
......@@ -240,7 +240,18 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
size_t output_count = 0;
// TODO(turbofan): match complex addressing modes.
if (g.CanBeImmediate(right)) {
if (left == right) {
// If both inputs refer to the same operand, enforce allocating a register
// for both of them to ensure that we don't end up generating code like
// this:
//
// mov rax, [rbp-0x10]
// add rax, [rbp-0x10]
// jo label
InstructionOperand* const input = g.UseRegister(left);
inputs[input_count++] = input;
inputs[input_count++] = input;
} else if (g.CanBeImmediate(right)) {
inputs[input_count++] = g.UseRegister(left);
inputs[input_count++] = g.UseImmediate(right);
} else {
......@@ -796,13 +807,6 @@ static void VisitWordCompare(InstructionSelector* selector, Node* node,
}
static void VisitWordTest(InstructionSelector* selector, Node* node,
InstructionCode opcode, FlagsContinuation* cont) {
X64OperandGenerator g(selector);
VisitCompare(selector, opcode, g.Use(node), g.TempImmediate(-1), cont);
}
static void VisitFloat64Compare(InstructionSelector* selector, Node* node,
FlagsContinuation* cont) {
X64OperandGenerator g(selector);
......@@ -815,7 +819,7 @@ static void VisitFloat64Compare(InstructionSelector* selector, Node* node,
void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
BasicBlock* fbranch) {
OperandGenerator g(this);
X64OperandGenerator g(this);
Node* user = branch;
Node* value = branch->InputAt(0);
......@@ -918,15 +922,19 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
break;
case IrOpcode::kInt32Sub:
return VisitWordCompare(this, value, kX64Cmp32, &cont, false);
case IrOpcode::kInt64Sub:
return VisitWordCompare(this, value, kX64Cmp, &cont, false);
case IrOpcode::kWord32And:
return VisitWordCompare(this, value, kX64Test32, &cont, true);
case IrOpcode::kWord64And:
return VisitWordCompare(this, value, kX64Test, &cont, true);
default:
break;
}
}
// Branch could not be combined with a compare, emit compare against 0.
VisitWordTest(this, value, kX64Test32, &cont);
VisitCompare(this, kX64Cmp32, g.Use(value), g.TempImmediate(0), &cont);
}
......@@ -945,7 +953,6 @@ void InstructionSelector::VisitWord32Equal(Node* const node) {
default:
break;
}
return VisitWordTest(this, value, kX64Test32, &cont);
}
}
VisitWordCompare(this, node, kX64Cmp32, &cont, false);
......@@ -991,7 +998,6 @@ void InstructionSelector::VisitWord64Equal(Node* const node) {
default:
break;
}
return VisitWordTest(this, value, kX64Test, &cont);
}
}
VisitWordCompare(this, node, kX64Cmp, &cont, false);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment