Commit 962f025a authored by Clemens Hammacher's avatar Clemens Hammacher Committed by Commit Bot

[Liftoff] [ia32] Optimize stack limit check on ia32

On ia32, we can encode the address of the stack limit in the operand
directly, saving one mov instruction and reducing register pressure.

R=titzer@chromium.org

Bug: v8:6600
Change-Id: I2742efbfea16d56d648c233a2dba1d8672dc489d
Reviewed-on: https://chromium-review.googlesource.com/930961
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: 's avatarBen Titzer <titzer@chromium.org>
Cr-Commit-Position: refs/heads/master@{#51463}
parent 9af1556f
...@@ -315,12 +315,6 @@ void Operand::set_disp8(int8_t disp) { ...@@ -315,12 +315,6 @@ void Operand::set_disp8(int8_t disp) {
*reinterpret_cast<int8_t*>(&buf_[len_++]) = disp; *reinterpret_cast<int8_t*>(&buf_[len_++]) = disp;
} }
Operand::Operand(Immediate imm) {
// [disp/r]
set_modrm(0, ebp);
set_dispr(imm.immediate(), imm.rmode_);
}
} // namespace internal } // namespace internal
} // namespace v8 } // namespace v8
......
...@@ -341,7 +341,10 @@ class Operand BASE_EMBEDDED { ...@@ -341,7 +341,10 @@ class Operand BASE_EMBEDDED {
} }
// [disp/r] // [disp/r]
INLINE(explicit Operand(Immediate imm)); INLINE(explicit Operand(Immediate imm)) {
set_modrm(0, ebp);
set_dispr(imm.immediate(), imm.rmode_);
}
// [base + disp/r] // [base + disp/r]
explicit Operand(Register base, int32_t disp, explicit Operand(Register base, int32_t disp,
......
...@@ -669,9 +669,8 @@ void LiftoffAssembler::emit_i32_set_cond(Condition cond, Register dst, ...@@ -669,9 +669,8 @@ void LiftoffAssembler::emit_i32_set_cond(Condition cond, Register dst,
} }
void LiftoffAssembler::StackCheck(Label* ool_code) { void LiftoffAssembler::StackCheck(Label* ool_code) {
Register limit = GetUnusedRegister(kGpReg).gp(); cmp(esp,
mov(limit, Immediate(ExternalReference::address_of_stack_limit(isolate()))); Operand(Immediate(ExternalReference::address_of_stack_limit(isolate()))));
cmp(esp, Operand(limit, 0));
j(below_equal, ool_code); j(below_equal, ool_code);
} }
......
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