MIPS: port Add missing write barrier for arguments store ICs.

Ported r8390 (52d4605)

BUG=
TEST=

Review URL: http://codereview.chromium.org//7238020
Patch from Paul Lind <plind44@gmail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8405 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/mips/ic-mips.cc

@@ -1006,6 +1006,8 @@ void KeyedStoreIC::GenerateNonStrictArguments(MacroAssembler* masm) {
   MemOperand mapped_location =
       GenerateMappedArgumentsLookup(masm, a2, a1, a3, t0, t1, &notin, &slow);
   __ sw(a0, mapped_location);
+  __ Addu(t2, a3, t1);
+  __ RecordWrite(a3, t2, t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&notin);
@@ -1013,6 +1015,8 @@ void KeyedStoreIC::GenerateNonStrictArguments(MacroAssembler* masm) {
   MemOperand unmapped_location =
       GenerateUnmappedArgumentsLookup(masm, a1, a3, t0, &slow);
   __ sw(a0, unmapped_location);
+  __ Addu(t2, a3, t0);
+  __ RecordWrite(a3, t2, t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&slow);