Commit 9307f8ea authored by danno@chromium.org's avatar danno@chromium.org

Fix SSE2 debug asserts in LayoutTests

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/11675005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13280 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent 2f821f1e
...@@ -324,37 +324,29 @@ void LGapResolver::EmitMove(int index) { ...@@ -324,37 +324,29 @@ void LGapResolver::EmitMove(int index) {
} }
} else if (source->IsDoubleRegister()) { } else if (source->IsDoubleRegister()) {
if (CpuFeatures::IsSupported(SSE2)) { CpuFeatures::Scope scope(SSE2);
CpuFeatures::Scope scope(SSE2); XMMRegister src = cgen_->ToDoubleRegister(source);
XMMRegister src = cgen_->ToDoubleRegister(source); if (destination->IsDoubleRegister()) {
if (destination->IsDoubleRegister()) { XMMRegister dst = cgen_->ToDoubleRegister(destination);
XMMRegister dst = cgen_->ToDoubleRegister(destination); __ movaps(dst, src);
__ movaps(dst, src);
} else {
ASSERT(destination->IsDoubleStackSlot());
Operand dst = cgen_->ToOperand(destination);
__ movdbl(dst, src);
}
} else { } else {
UNREACHABLE(); ASSERT(destination->IsDoubleStackSlot());
Operand dst = cgen_->ToOperand(destination);
__ movdbl(dst, src);
} }
} else if (source->IsDoubleStackSlot()) { } else if (source->IsDoubleStackSlot()) {
if (CpuFeatures::IsSupported(SSE2)) { CpuFeatures::Scope scope(SSE2);
CpuFeatures::Scope scope(SSE2); ASSERT(destination->IsDoubleRegister() ||
ASSERT(destination->IsDoubleRegister() || destination->IsDoubleStackSlot());
destination->IsDoubleStackSlot()); Operand src = cgen_->ToOperand(source);
Operand src = cgen_->ToOperand(source); if (destination->IsDoubleRegister()) {
if (destination->IsDoubleRegister()) { XMMRegister dst = cgen_->ToDoubleRegister(destination);
XMMRegister dst = cgen_->ToDoubleRegister(destination); __ movdbl(dst, src);
__ movdbl(dst, src);
} else {
// We rely on having xmm0 available as a fixed scratch register.
Operand dst = cgen_->ToOperand(destination);
__ movdbl(xmm0, src);
__ movdbl(dst, xmm0);
}
} else { } else {
UNREACHABLE(); // We rely on having xmm0 available as a fixed scratch register.
Operand dst = cgen_->ToOperand(destination);
__ movdbl(xmm0, src);
__ movdbl(dst, xmm0);
} }
} else { } else {
UNREACHABLE(); UNREACHABLE();
...@@ -429,6 +421,7 @@ void LGapResolver::EmitSwap(int index) { ...@@ -429,6 +421,7 @@ void LGapResolver::EmitSwap(int index) {
__ movaps(dst, xmm0); __ movaps(dst, xmm0);
} else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) { } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) {
CpuFeatures::Scope scope(SSE2);
// XMM register-memory swap. We rely on having xmm0 // XMM register-memory swap. We rely on having xmm0
// available as a fixed scratch register. // available as a fixed scratch register.
ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot()); ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot());
...@@ -442,6 +435,7 @@ void LGapResolver::EmitSwap(int index) { ...@@ -442,6 +435,7 @@ void LGapResolver::EmitSwap(int index) {
__ movdbl(reg, Operand(xmm0)); __ movdbl(reg, Operand(xmm0));
} else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) { } else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) {
CpuFeatures::Scope scope(SSE2);
// Double-width memory-to-memory. Spill on demand to use a general // Double-width memory-to-memory. Spill on demand to use a general
// purpose temporary register and also rely on having xmm0 available as // purpose temporary register and also rely on having xmm0 available as
// a fixed scratch register. // a fixed scratch register.
......
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