[mips][wasm-simd] Implement i64x2.abs

Port: fd244de2

Bug: v8:11416
Change-Id: I8f2840337d77ddfa430f57737360fb0b679f2f33
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2713574
Auto-Submit: Liu yu <liuyu@loongson.cn>
Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#72938}

src/compiler/backend/mips/code-generator-mips.cc

@@ -2305,6 +2305,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
                  i.InputSimd128Register(0));
       break;
     }
+    case kMipsI64x2Abs: {
+      CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
+      __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero);
+      __ adds_a_d(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                  kSimd128RegZero);
+      break;
+    }
     case kMipsI64x2SConvertI32x4Low: {
       CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
       Simd128Register dst = i.OutputSimd128Register();

src/compiler/backend/mips/instruction-codes-mips.h

@@ -175,6 +175,7 @@ namespace compiler {
   V(MipsI64x2Ne)                   \
   V(MipsI64x2GtS)                  \
   V(MipsI64x2GeS)                  \
+  V(MipsI64x2Abs)                  \
   V(MipsI64x2SConvertI32x4Low)     \
   V(MipsI64x2SConvertI32x4High)    \
   V(MipsI64x2UConvertI32x4Low)     \

src/compiler/backend/mips/instruction-scheduler-mips.cc

@@ -78,6 +78,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kMipsI64x2Ne:
     case kMipsI64x2GtS:
     case kMipsI64x2GeS:
+    case kMipsI64x2Abs:
     case kMipsI64x2SConvertI32x4Low:
     case kMipsI64x2SConvertI32x4High:
     case kMipsI64x2UConvertI32x4Low:

src/compiler/backend/mips/instruction-selector-mips.cc

@@ -2128,6 +2128,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
   V(F64x2PromoteLowF32x4, kMipsF64x2PromoteLowF32x4)       \
   V(I64x2Neg, kMipsI64x2Neg)                               \
   V(I64x2BitMask, kMipsI64x2BitMask)                       \
+  V(I64x2Abs, kMipsI64x2Abs)                               \
   V(I64x2SConvertI32x4Low, kMipsI64x2SConvertI32x4Low)     \
   V(I64x2SConvertI32x4High, kMipsI64x2SConvertI32x4High)   \
   V(I64x2UConvertI32x4Low, kMipsI64x2UConvertI32x4Low)     \

src/compiler/backend/mips64/code-generator-mips64.cc

@@ -2429,6 +2429,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
                  i.InputSimd128Register(0));
       break;
     }
+    case kMips64I64x2Abs: {
+      CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
+      __ xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero);
+      __ add_a_d(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                 kSimd128RegZero);
+      break;
+    }
     case kMips64I64x2SConvertI32x4Low: {
       CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
       Simd128Register dst = i.OutputSimd128Register();

src/compiler/backend/mips64/instruction-codes-mips64.h

@@ -228,6 +228,7 @@ namespace compiler {
   V(Mips64I64x2Ne)                           \
   V(Mips64I64x2GtS)                          \
   V(Mips64I64x2GeS)                          \
+  V(Mips64I64x2Abs)                          \
   V(Mips64I64x2SConvertI32x4Low)             \
   V(Mips64I64x2SConvertI32x4High)            \
   V(Mips64I64x2UConvertI32x4Low)             \

src/compiler/backend/mips64/instruction-scheduler-mips64.cc

@@ -106,6 +106,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kMips64I64x2Ne:
     case kMips64I64x2GtS:
     case kMips64I64x2GeS:
+    case kMips64I64x2Abs:
     case kMips64I64x2SConvertI32x4Low:
     case kMips64I64x2SConvertI32x4High:
     case kMips64I64x2UConvertI32x4Low:

src/compiler/backend/mips64/instruction-selector-mips64.cc

@@ -2875,6 +2875,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
   V(F32x4Trunc, kMips64F32x4Trunc)                           \
   V(F32x4NearestInt, kMips64F32x4NearestInt)                 \
   V(F32x4DemoteF64x2Zero, kMips64F32x4DemoteF64x2Zero)       \
+  V(I64x2Abs, kMips64I64x2Abs)                               \
   V(I64x2SConvertI32x4Low, kMips64I64x2SConvertI32x4Low)     \
   V(I64x2SConvertI32x4High, kMips64I64x2SConvertI32x4High)   \
   V(I64x2UConvertI32x4Low, kMips64I64x2UConvertI32x4Low)     \