[mips] Fix floating point abs operation

Float32/64 abs operation should only clear the sign bit, but abs.s
and abs.d instructions of mips64r2 would convert nan to canonical
nan.

Change-Id: Ibbd05cdb3a73acfe0e532030d1815d262c3ac433
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2439768
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Cr-Commit-Position: refs/heads/master@{#70214}

src/compiler/backend/mips/code-generator-mips.cc

@@ -1239,7 +1239,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       break;
     }
     case kMipsAbsS:
+      if (IsMipsArchVariant(kMips32r6)) {
         __ abs_s(i.OutputSingleRegister(), i.InputSingleRegister(0));
+      } else {
+        __ mfc1(kScratchReg, i.InputSingleRegister(0));
+        __ Ins(kScratchReg, zero_reg, 31, 1);
+        __ mtc1(kScratchReg, i.OutputSingleRegister());
+      }
       break;
     case kMipsSqrtS: {
       __ sqrt_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
@@ -1331,7 +1337,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       break;
     }
     case kMipsAbsD:
+      if (IsMipsArchVariant(kMips32r6)) {
         __ abs_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+      } else {
+        __ mfhc1(kScratchReg, i.InputDoubleRegister(0));
+        __ Ins(kScratchReg, zero_reg, 31, 1);
+        __ mthc1(kScratchReg, i.OutputDoubleRegister());
+      }
       break;
     case kMipsNegS:
       __ Neg_s(i.OutputSingleRegister(), i.InputSingleRegister(0));

src/compiler/backend/mips64/code-generator-mips64.cc

@@ -1318,7 +1318,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       break;
     }
     case kMips64AbsS:
+      if (kArchVariant == kMips64r6) {
         __ abs_s(i.OutputSingleRegister(), i.InputSingleRegister(0));
+      } else {
+        __ mfc1(kScratchReg, i.InputSingleRegister(0));
+        __ Dins(kScratchReg, zero_reg, 31, 1);
+        __ mtc1(kScratchReg, i.OutputSingleRegister());
+      }
       break;
     case kMips64NegS:
       __ Neg_s(i.OutputSingleRegister(), i.InputSingleRegister(0));
@@ -1378,7 +1384,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       break;
     }
     case kMips64AbsD:
+      if (kArchVariant == kMips64r6) {
         __ abs_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+      } else {
+        __ dmfc1(kScratchReg, i.InputDoubleRegister(0));
+        __ Dins(kScratchReg, zero_reg, 63, 1);
+        __ dmtc1(kScratchReg, i.OutputDoubleRegister());
+      }
       break;
     case kMips64NegD:
       __ Neg_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0));