[wasm-simd][arm64] Consolidate v128.load_zero with LdrS and LdrD

We don't need separate Load32Zero and Load64Zero instructions, since the
implementation is LdrS and LdrD, which we already have.

Bug: v8:11038
Change-Id: I784ec8dc419c0d59de97eb2bb0b464c176dacae1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2501969
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Bill Budge <bbudge@chromium.org>
Cr-Commit-Position: refs/heads/master@{#72443}

src/compiler/backend/arm64/code-generator-arm64.cc

@@ -2805,16 +2805,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ Uxtl(i.OutputSimd128Register().V2D(), i.OutputSimd128Register().V2S());
       break;
     }
-    case kArm64S128Load32Zero: {
-      EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
-      __ Ldr(i.OutputSimd128Register().S(), i.MemoryOperand(0));
-      break;
-    }
-    case kArm64S128Load64Zero: {
-      EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
-      __ Ldr(i.OutputSimd128Register().D(), i.MemoryOperand(0));
-      break;
-    }
 #define SIMD_REDUCE_OP_CASE(Op, Instr, format, FORMAT)     \
   case Op: {                                               \
     UseScratchRegisterScope scope(tasm());                 \

src/compiler/backend/arm64/instruction-codes-arm64.h

@@ -386,8 +386,6 @@ namespace compiler {
   V(Arm64S128Load16x4U)                     \
   V(Arm64S128Load32x2S)                     \
   V(Arm64S128Load32x2U)                     \
-  V(Arm64S128Load32Zero)                    \
-  V(Arm64S128Load64Zero)                    \
   V(Arm64Word64AtomicLoadUint8)             \
   V(Arm64Word64AtomicLoadUint16)            \
   V(Arm64Word64AtomicLoadUint32)            \

src/compiler/backend/arm64/instruction-scheduler-arm64.cc

@@ -374,8 +374,6 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArm64S128Load16x4U:
     case kArm64S128Load32x2S:
     case kArm64S128Load32x2U:
-    case kArm64S128Load32Zero:
-    case kArm64S128Load64Zero:
       return kIsLoadOperation;
 
     case kArm64Claim:

src/compiler/backend/arm64/instruction-selector-arm64.cc

@@ -751,10 +751,10 @@ void InstructionSelector::VisitLoadTransform(Node* node) {
       opcode = kArm64S128Load32x2U;
       break;
     case LoadTransformation::kS128Load32Zero:
-      opcode = kArm64S128Load32Zero;
+      opcode = kArm64LdrS;
       break;
     case LoadTransformation::kS128Load64Zero:
-      opcode = kArm64S128Load64Zero;
+      opcode = kArm64LdrD;
       break;
     default:
       UNIMPLEMENTED();