[mips][wasm-simd] Implement saturating rounding multiply high

Port: e14de8b9

Bug: v8:10971
Change-Id: Ia193010133ffc4ac49268ed095cdda8f7b732234
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2629110
Auto-Submit: Liu yu <liuyu@loongson.cn>
Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#72092}

src/compiler/backend/mips/code-generator-mips.cc

@@ -2832,6 +2832,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ copy_u_b(dst, scratch0, 0);
       break;
     }
+    case kMipsI16x8Q15MulRSatS: {
+      CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
+      __ mulr_q_h(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                  i.InputSimd128Register(1));
+      break;
+    }
     case kMipsI8x16Splat: {
       CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
       __ fill_b(i.OutputSimd128Register(), i.InputRegister(0));

src/compiler/backend/mips/instruction-codes-mips.h

@@ -256,6 +256,7 @@ namespace compiler {
   V(MipsI16x8RoundingAverageU)     \
   V(MipsI16x8Abs)                  \
   V(MipsI16x8BitMask)              \
+  V(MipsI16x8Q15MulRSatS)          \
   V(MipsI16x8ExtMulLowI8x16S)      \
   V(MipsI16x8ExtMulHighI8x16S)     \
   V(MipsI16x8ExtMulLowI8x16U)      \

src/compiler/backend/mips/instruction-scheduler-mips.cc

@@ -157,6 +157,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kMipsI16x8UConvertI8x16Low:
     case kMipsI16x8Abs:
     case kMipsI16x8BitMask:
+    case kMipsI16x8Q15MulRSatS:
     case kMipsI16x8ExtMulLowI8x16S:
     case kMipsI16x8ExtMulHighI8x16S:
     case kMipsI16x8ExtMulLowI8x16U:

src/compiler/backend/mips/instruction-selector-mips.cc

@@ -2242,6 +2242,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
   V(I16x8GeU, kMipsI16x8GeU)                           \
   V(I16x8SConvertI32x4, kMipsI16x8SConvertI32x4)       \
   V(I16x8UConvertI32x4, kMipsI16x8UConvertI32x4)       \
+  V(I16x8Q15MulRSatS, kMipsI16x8Q15MulRSatS)           \
   V(I16x8ExtMulLowI8x16S, kMipsI16x8ExtMulLowI8x16S)   \
   V(I16x8ExtMulHighI8x16S, kMipsI16x8ExtMulHighI8x16S) \
   V(I16x8ExtMulLowI8x16U, kMipsI16x8ExtMulLowI8x16U)   \

src/compiler/backend/mips64/code-generator-mips64.cc

@@ -3017,6 +3017,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ copy_u_b(dst, scratch0, 0);
       break;
     }
+    case kMips64I16x8Q15MulRSatS: {
+      CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
+      __ mulr_q_h(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                  i.InputSimd128Register(1));
+      break;
+    }
     case kMips64I8x16Splat: {
       CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
       __ fill_b(i.OutputSimd128Register(), i.InputRegister(0));

src/compiler/backend/mips64/instruction-codes-mips64.h

@@ -285,6 +285,7 @@ namespace compiler {
   V(Mips64I16x8RoundingAverageU)             \
   V(Mips64I16x8Abs)                          \
   V(Mips64I16x8BitMask)                      \
+  V(Mips64I16x8Q15MulRSatS)                  \
   V(Mips64I8x16Splat)                        \
   V(Mips64I8x16ExtractLaneU)                 \
   V(Mips64I8x16ExtractLaneS)                 \

src/compiler/backend/mips64/instruction-scheduler-mips64.cc

@@ -188,6 +188,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kMips64I16x8RoundingAverageU:
     case kMips64I16x8Abs:
     case kMips64I16x8BitMask:
+    case kMips64I16x8Q15MulRSatS:
     case kMips64I32x4Add:
     case kMips64I32x4AddHoriz:
     case kMips64I32x4Eq:

src/compiler/backend/mips64/instruction-selector-mips64.cc

@@ -2998,6 +2998,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
   V(I16x8RoundingAverageU, kMips64I16x8RoundingAverageU) \
   V(I16x8SConvertI32x4, kMips64I16x8SConvertI32x4)       \
   V(I16x8UConvertI32x4, kMips64I16x8UConvertI32x4)       \
+  V(I16x8Q15MulRSatS, kMips64I16x8Q15MulRSatS)           \
   V(I8x16Add, kMips64I8x16Add)                           \
   V(I8x16AddSatS, kMips64I8x16AddSatS)                   \
   V(I8x16AddSatU, kMips64I8x16AddSatU)                   \