ppc: [liftoff] implement count leading/trailing zeros

Change-Id: Ib10b00443fe1d46ccb75bd93ec0c855919bb563d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3058295Reviewed-by: Milad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75964}

src/codegen/ppc/macro-assembler-ppc.cc

@@ -3573,6 +3573,24 @@ void TurboAssembler::Popcnt32(Register dst, Register src) { popcntw(dst, src); }
 
 void TurboAssembler::Popcnt64(Register dst, Register src) { popcntd(dst, src); }
 
+void TurboAssembler::CountLeadingZerosU32(Register dst, Register src, RCBit r) {
+  cntlzw(dst, src, r);
+}
+
+void TurboAssembler::CountLeadingZerosU64(Register dst, Register src, RCBit r) {
+  cntlzd(dst, src, r);
+}
+
+void TurboAssembler::CountTrailingZerosU32(Register dst, Register src,
+                                           RCBit r) {
+  cnttzw(dst, src, r);
+}
+
+void TurboAssembler::CountTrailingZerosU64(Register dst, Register src,
+                                           RCBit r) {
+  cnttzd(dst, src, r);
+}
+
 }  // namespace internal
 }  // namespace v8
 

src/codegen/ppc/macro-assembler-ppc.h

@@ -238,6 +238,11 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   void ShiftRightS32(Register dst, Register src, Register value,
                      RCBit r = LeaveRC);
 
+  void CountLeadingZerosU32(Register dst, Register src, RCBit r = LeaveRC);
+  void CountLeadingZerosU64(Register dst, Register src, RCBit r = LeaveRC);
+  void CountTrailingZerosU32(Register dst, Register src, RCBit r = LeaveRC);
+  void CountTrailingZerosU64(Register dst, Register src, RCBit r = LeaveRC);
+
   void AddF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
               RCBit r = LeaveRC);
   void SubF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,

src/wasm/baseline/ppc/liftoff-assembler-ppc.h

@@ -784,8 +784,6 @@ void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) {
     bailout(kUnsupportedArchitecture, "i64 shiftop: " #name);                  \
   }
 
-UNIMPLEMENTED_GP_UNOP(i32_clz)
-UNIMPLEMENTED_GP_UNOP(i32_ctz)
 UNIMPLEMENTED_FP_BINOP(f32_copysign)
 UNIMPLEMENTED_FP_UNOP(f32_abs)
 UNIMPLEMENTED_FP_UNOP(f32_neg)
@@ -825,9 +823,15 @@ UNIMPLEMENTED_FP_UNOP(f64_sqrt)
 #define LFR_TO_REG(reg) reg.gp()
 
 // V(name, instr, dtype, stype, dcast, scast, rcast, return_val, return_type)
-#define UNOP_LIST(V)                                                    \
-  V(i32_popcnt, Popcnt32, Register, Register, , , USE, true, bool)      \
-  V(i64_popcnt, Popcnt64, LiftoffRegister, LiftoffRegister, LFR_TO_REG, \
+#define UNOP_LIST(V)                                                     \
+  V(i32_clz, CountLeadingZerosU32, Register, Register, , , USE, , void)  \
+  V(i32_ctz, CountTrailingZerosU32, Register, Register, , , USE, , void) \
+  V(i64_clz, CountLeadingZerosU64, LiftoffRegister, LiftoffRegister,     \
+    LFR_TO_REG, LFR_TO_REG, USE, , void)                                 \
+  V(i64_ctz, CountTrailingZerosU64, LiftoffRegister, LiftoffRegister,    \
+    LFR_TO_REG, LFR_TO_REG, USE, , void)                                 \
+  V(i32_popcnt, Popcnt32, Register, Register, , , USE, true, bool)       \
+  V(i64_popcnt, Popcnt64, LiftoffRegister, LiftoffRegister, LFR_TO_REG,  \
     LFR_TO_REG, USE, true, bool)
 
 #define EMIT_UNOP_FUNCTION(name, instr, dtype, stype, dcast, scast, rcast, \
@@ -996,14 +1000,6 @@ bool LiftoffAssembler::emit_i64_remu(LiftoffRegister dst, LiftoffRegister lhs,
   return true;
 }
 
-void LiftoffAssembler::emit_i64_clz(LiftoffRegister dst, LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "i64_clz");
-}
-
-void LiftoffAssembler::emit_i64_ctz(LiftoffRegister dst, LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "i64_ctz");
-}
-
 void LiftoffAssembler::emit_u32_to_intptr(Register dst, Register src) {
 #ifdef V8_TARGET_ARCH_PPC64
   bailout(kUnsupportedArchitecture, "emit_u32_to_intptr");