[wasm-simd][arm] Prototype f64x2.nearest

Prototype f64x2.nearest on ARM for both ARM v7 and ARM v8. ARM v8 has
support for vrintn, and for ARM v7 we fallback to runtime.

Since ARM v8 uses vrintn, which is the same instruction used for
F64RoundTiesEven (scalar), wasm-compiler reuses the Float64RoundTiesEven
check.

Bug: v8:10553
Change-Id: Ia4c4245cac87c132331f54e81dad323fc3fb9f6d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2268358Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68619}

src/codegen/external-reference.cc

@@ -300,6 +300,7 @@ FUNCTION_REFERENCE(wasm_word64_ror, wasm::word64_ror_wrapper)
 FUNCTION_REFERENCE(wasm_f64x2_ceil, wasm::f64x2_ceil_wrapper)
 FUNCTION_REFERENCE(wasm_f64x2_floor, wasm::f64x2_floor_wrapper)
 FUNCTION_REFERENCE(wasm_f64x2_trunc, wasm::f64x2_trunc_wrapper)
+FUNCTION_REFERENCE(wasm_f64x2_nearest_int, wasm::f64x2_nearest_int_wrapper)
 FUNCTION_REFERENCE(wasm_f32x4_ceil, wasm::f32x4_ceil_wrapper)
 FUNCTION_REFERENCE(wasm_f32x4_floor, wasm::f32x4_floor_wrapper)
 FUNCTION_REFERENCE(wasm_f32x4_trunc, wasm::f32x4_trunc_wrapper)

src/codegen/external-reference.h

@@ -209,6 +209,7 @@ class StatsCounter;
   V(wasm_f64x2_ceil, "wasm::f64x2_ceil_wrapper")                              \
   V(wasm_f64x2_floor, "wasm::f64x2_floor_wrapper")                            \
   V(wasm_f64x2_trunc, "wasm::f64x2_trunc_wrapper")                            \
+  V(wasm_f64x2_nearest_int, "wasm::f64x2_nearest_int_wrapper")                \
   V(wasm_f32x4_ceil, "wasm::f32x4_ceil_wrapper")                              \
   V(wasm_f32x4_floor, "wasm::f32x4_floor_wrapper")                            \
   V(wasm_f32x4_trunc, "wasm::f32x4_trunc_wrapper")                            \

src/compiler/backend/arm/code-generator-arm.cc

@@ -2059,6 +2059,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vrintz(dst.high(), src.high());
       break;
     }
+    case kArmF64x2NearestInt: {
+      CpuFeatureScope scope(tasm(), ARMv8);
+      Simd128Register dst = i.OutputSimd128Register();
+      Simd128Register src = i.InputSimd128Register(0);
+      __ vrintn(dst.low(), src.low());
+      __ vrintn(dst.high(), src.high());
+      break;
+    }
     case kArmI64x2SplatI32Pair: {
       Simd128Register dst = i.OutputSimd128Register();
       __ vdup(Neon32, dst, i.InputRegister(0));

src/compiler/backend/arm/instruction-codes-arm.h

@@ -149,6 +149,7 @@ namespace compiler {
   V(ArmF64x2Ceil)                  \
   V(ArmF64x2Floor)                 \
   V(ArmF64x2Trunc)                 \
+  V(ArmF64x2NearestInt)            \
   V(ArmF32x4Splat)                 \
   V(ArmF32x4ExtractLane)           \
   V(ArmF32x4ReplaceLane)           \

src/compiler/backend/arm/instruction-scheduler-arm.cc

@@ -129,6 +129,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmF64x2Ceil:
     case kArmF64x2Floor:
     case kArmF64x2Trunc:
+    case kArmF64x2NearestInt:
     case kArmF32x4Splat:
     case kArmF32x4ExtractLane:
     case kArmF32x4ReplaceLane:

src/compiler/backend/arm/instruction-selector-arm.cc

@@ -1486,22 +1486,23 @@ void InstructionSelector::VisitUint32Mod(Node* node) {
   V(Float32Sqrt, kArmVsqrtF32)                       \
   V(Float64Sqrt, kArmVsqrtF64)
 
-#define RR_OP_LIST_V8(V)                 \
-  V(Float32RoundDown, kArmVrintmF32)     \
-  V(Float64RoundDown, kArmVrintmF64)     \
-  V(Float32RoundUp, kArmVrintpF32)       \
-  V(Float64RoundUp, kArmVrintpF64)       \
-  V(Float32RoundTruncate, kArmVrintzF32) \
-  V(Float64RoundTruncate, kArmVrintzF64) \
-  V(Float64RoundTiesAway, kArmVrintaF64) \
-  V(Float32RoundTiesEven, kArmVrintnF32) \
-  V(Float64RoundTiesEven, kArmVrintnF64) \
-  V(F64x2Ceil, kArmF64x2Ceil)            \
-  V(F64x2Floor, kArmF64x2Floor)          \
-  V(F64x2Trunc, kArmF64x2Trunc)          \
-  V(F32x4Ceil, kArmVrintpF32)            \
-  V(F32x4Floor, kArmVrintmF32)           \
-  V(F32x4Trunc, kArmVrintzF32)           \
+#define RR_OP_LIST_V8(V)                  \
+  V(Float32RoundDown, kArmVrintmF32)      \
+  V(Float64RoundDown, kArmVrintmF64)      \
+  V(Float32RoundUp, kArmVrintpF32)        \
+  V(Float64RoundUp, kArmVrintpF64)        \
+  V(Float32RoundTruncate, kArmVrintzF32)  \
+  V(Float64RoundTruncate, kArmVrintzF64)  \
+  V(Float64RoundTiesAway, kArmVrintaF64)  \
+  V(Float32RoundTiesEven, kArmVrintnF32)  \
+  V(Float64RoundTiesEven, kArmVrintnF64)  \
+  V(F64x2Ceil, kArmF64x2Ceil)             \
+  V(F64x2Floor, kArmF64x2Floor)           \
+  V(F64x2Trunc, kArmF64x2Trunc)           \
+  V(F64x2NearestInt, kArmF64x2NearestInt) \
+  V(F32x4Ceil, kArmVrintpF32)             \
+  V(F32x4Floor, kArmVrintmF32)            \
+  V(F32x4Trunc, kArmVrintzF32)            \
   V(F32x4NearestInt, kArmVrintnF32)
 
 #define RRR_OP_LIST(V)          \

src/compiler/backend/instruction-selector.cc

@@ -2688,20 +2688,16 @@ void InstructionSelector::VisitF64x2Pmax(Node* node) { UNIMPLEMENTED(); }
         // !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64
 
 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_S390X && \
-    !V8_TARGET_ARCH_IA32
+    !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_ARM
 // TODO(v8:10553) Prototyping floating point rounding instructions.
-// TODO(zhin): Temporary convoluted way to for unimplemented opcodes on ARM as
-// we are implementing them one at a time.
-#if !V8_TARGET_ARCH_ARM
 void InstructionSelector::VisitF64x2Ceil(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Floor(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Trunc(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitF64x2NearestInt(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4Ceil(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4Floor(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4Trunc(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4NearestInt(Node* node) { UNIMPLEMENTED(); }
-#endif  // !V8_TARGET_ARCH_ARM
-void InstructionSelector::VisitF64x2NearestInt(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_S390X
         // && !V8_TARGET_ARCH_IA32
 

src/compiler/wasm-compiler.cc

@@ -4058,6 +4058,12 @@ Node* WasmGraphBuilder::BuildF64x2Trunc(Node* input) {
   return BuildCFuncInstruction(ref, type, input);
 }
 
+Node* WasmGraphBuilder::BuildF64x2NearestInt(Node* input) {
+  MachineType type = MachineType::Simd128();
+  ExternalReference ref = ExternalReference::wasm_f64x2_nearest_int();
+  return BuildCFuncInstruction(ref, type, input);
+}
+
 Node* WasmGraphBuilder::BuildF32x4Ceil(Node* input) {
   MachineType type = MachineType::Simd128();
   ExternalReference ref = ExternalReference::wasm_f32x4_ceil();
@@ -4259,6 +4265,10 @@ Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode, Node* const* inputs) {
         return BuildF64x2Trunc(inputs[0]);
       return graph()->NewNode(mcgraph()->machine()->F64x2Trunc(), inputs[0]);
     case wasm::kExprF64x2NearestInt:
+      // Architecture support for F64x2NearestInt and Float64RoundTiesEven is
+      // the same.
+      if (!mcgraph()->machine()->Float64RoundTiesEven().IsSupported())
+        return BuildF64x2NearestInt(inputs[0]);
       return graph()->NewNode(mcgraph()->machine()->F64x2NearestInt(),
                               inputs[0]);
     case wasm::kExprF32x4Splat:

src/compiler/wasm-compiler.h

@@ -564,6 +564,7 @@ class WasmGraphBuilder {
   Node* BuildF64x2Ceil(Node* input);
   Node* BuildF64x2Floor(Node* input);
   Node* BuildF64x2Trunc(Node* input);
+  Node* BuildF64x2NearestInt(Node* input);
   Node* BuildF32x4Ceil(Node* input);
   Node* BuildF32x4Floor(Node* input);
   Node* BuildF32x4Trunc(Node* input);

src/wasm/wasm-external-refs.cc

@@ -423,6 +423,10 @@ void f64x2_trunc_wrapper(Address data) {
   simd_float_round_wrapper<double, &trunc>(data);
 }
 
+void f64x2_nearest_int_wrapper(Address data) {
+  simd_float_round_wrapper<double, &nearbyint>(data);
+}
+
 void f32x4_ceil_wrapper(Address data) {
   simd_float_round_wrapper<float, &ceilf>(data);
 }

src/wasm/wasm-external-refs.h

@@ -85,6 +85,8 @@ V8_EXPORT_PRIVATE void f64x2_floor_wrapper(Address data);
 
 V8_EXPORT_PRIVATE void f64x2_trunc_wrapper(Address data);
 
+V8_EXPORT_PRIVATE void f64x2_nearest_int_wrapper(Address data);
+
 V8_EXPORT_PRIVATE void f32x4_ceil_wrapper(Address data);
 
 V8_EXPORT_PRIVATE void f32x4_floor_wrapper(Address data);

test/cctest/wasm/test-run-wasm-simd.cc

@@ -1344,15 +1344,14 @@ WASM_SIMD_TEST_NO_LOWERING(F64x2Trunc) {
   FLAG_SCOPE(wasm_simd_post_mvp);
   RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Trunc, trunc, true);
 }
-#endif  // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X ||
-        // V8_TARGET_ARCH_ARM
-#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X
+
 WASM_SIMD_TEST_NO_LOWERING(F64x2NearestInt) {
   FLAG_SCOPE(wasm_simd_post_mvp);
   RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2NearestInt, nearbyint,
                    true);
 }
-#endif  // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X
+#endif  // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X ||
+        // V8_TARGET_ARCH_ARM
 
 void RunF64x2BinOpTest(ExecutionTier execution_tier, LowerSimd lower_simd,
                        WasmOpcode opcode, DoubleBinOp expected_op) {