[wasm-simd][ia32] Pattern match 32x4 rotate

Same pattern matching and implementation as x64 here:
https://crrev.com/c/2589062.

Change-Id: I11f8df79ab9910af9c7a97e2382144703be5916d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2591851Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71816}

src/compiler/backend/ia32/code-generator-ia32.cc

@@ -4009,6 +4009,18 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ Pmovzxdq(i.OutputSimd128Register(), i.MemoryOperand());
       break;
     }
+    case kIA32S32x4Rotate: {
+      XMMRegister dst = i.OutputSimd128Register();
+      XMMRegister src = i.InputSimd128Register(0);
+      uint8_t mask = i.InputUint8(1);
+      if (dst == src) {
+        // 1-byte shorter encoding than pshufd.
+        __ Shufps(dst, src, src, mask);
+      } else {
+        __ Pshufd(dst, src, mask);
+      }
+      break;
+    }
     case kIA32S32x4Swizzle: {
       DCHECK_EQ(2, instr->InputCount());
       __ Pshufd(i.OutputSimd128Register(), i.InputOperand(0), i.InputInt8(1));

src/compiler/backend/ia32/instruction-codes-ia32.h

@@ -377,6 +377,7 @@ namespace compiler {
   V(IA32S128Load16x4U)             \
   V(IA32S128Load32x2S)             \
   V(IA32S128Load32x2U)             \
+  V(IA32S32x4Rotate)               \
   V(IA32S32x4Swizzle)              \
   V(IA32S32x4Shuffle)              \
   V(IA32S16x8Blend)                \

src/compiler/backend/ia32/instruction-scheduler-ia32.cc

@@ -349,6 +349,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kIA32S128AndNot:
     case kIA32I8x16Swizzle:
     case kIA32I8x16Shuffle:
+    case kIA32S32x4Rotate:
     case kIA32S32x4Swizzle:
     case kIA32S32x4Shuffle:
     case kIA32S16x8Blend:

src/compiler/backend/ia32/instruction-selector-ia32.cc

@@ -2894,13 +2894,20 @@ void InstructionSelector::VisitI8x16Shuffle(Node* node) {
   int index;
   const ShuffleEntry* arch_shuffle;
   if (wasm::SimdShuffle::TryMatchConcat(shuffle, &offset)) {
-    // Swap inputs from the normal order for (v)palignr.
-    SwapShuffleInputs(node);
-    is_swizzle = false;  // It's simpler to just handle the general case.
-    no_same_as_first = use_avx;  // SSE requires same-as-first.
-    opcode = kIA32S8x16Alignr;
-    // palignr takes a single imm8 offset.
-    imms[imm_count++] = offset;
+    if (wasm::SimdShuffle::TryMatch32x4Rotate(shuffle, shuffle32x4,
+                                              is_swizzle)) {
+      uint8_t shuffle_mask = wasm::SimdShuffle::PackShuffle4(shuffle32x4);
+      opcode = kIA32S32x4Rotate;
+      imms[imm_count++] = shuffle_mask;
+    } else {
+      // Swap inputs from the normal order for (v)palignr.
+      SwapShuffleInputs(node);
+      is_swizzle = false;  // It's simpler to just handle the general case.
+      no_same_as_first = use_avx;  // SSE requires same-as-first.
+      opcode = kIA32S8x16Alignr;
+      // palignr takes a single imm8 offset.
+      imms[imm_count++] = offset;
+    }
   } else if (TryMatchArchShuffle(shuffle, arch_shuffles,
                                  arraysize(arch_shuffles), is_swizzle,
                                  &arch_shuffle)) {