Commit 8a7db67d authored by Junliang Yan's avatar Junliang Yan Committed by V8 LUCI CQ

ppc: rename StoreP/PX as StoreU64

Change-Id: Ia1b8bf3ada1957c27334e98207d57bb2e644ecdd
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2910796
Commit-Queue: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Auto-Submit: Junliang Yan <junyan@redhat.com>
Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#74702}
parent c55ee71f
This diff is collapsed.
......@@ -402,7 +402,7 @@ void TurboAssembler::MultiPush(RegList regs, Register location) {
for (int16_t i = Register::kNumRegisters - 1; i >= 0; i--) {
if ((regs & (1 << i)) != 0) {
stack_offset -= kSystemPointerSize;
StoreP(ToRegister(i), MemOperand(location, stack_offset));
StoreU64(ToRegister(i), MemOperand(location, stack_offset));
}
}
}
......@@ -525,7 +525,7 @@ void TurboAssembler::StoreTaggedFieldX(const Register& value,
stwx(value, dst_field_operand);
RecordComment("]");
} else {
StorePX(value, dst_field_operand);
StoreU64(value, dst_field_operand);
}
}
......@@ -537,7 +537,7 @@ void TurboAssembler::StoreTaggedField(const Register& value,
StoreWord(value, dst_field_operand, scratch);
RecordComment("]");
} else {
StoreP(value, dst_field_operand, scratch);
StoreU64(value, dst_field_operand, scratch);
}
}
......@@ -1200,20 +1200,20 @@ void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space,
if (FLAG_debug_code) {
li(r8, Operand::Zero());
StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
StoreU64(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
}
if (FLAG_enable_embedded_constant_pool) {
StoreP(kConstantPoolRegister,
MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
StoreU64(kConstantPoolRegister,
MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
}
// Save the frame pointer and the context in top.
Move(r8, ExternalReference::Create(IsolateAddressId::kCEntryFPAddress,
isolate()));
StoreP(fp, MemOperand(r8));
StoreU64(fp, MemOperand(r8));
Move(r8,
ExternalReference::Create(IsolateAddressId::kContextAddress, isolate()));
StoreP(cp, MemOperand(r8));
StoreU64(cp, MemOperand(r8));
// Optionally save all volatile double registers.
if (save_doubles) {
......@@ -1241,7 +1241,7 @@ void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space,
// Set the exit frame sp value to point just before the return address
// location.
addi(r8, sp, Operand((kStackFrameExtraParamSlot + 1) * kSystemPointerSize));
StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
StoreU64(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
}
int TurboAssembler::ActivationFrameAlignment() {
......@@ -1277,7 +1277,7 @@ void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
li(r6, Operand::Zero());
Move(ip, ExternalReference::Create(IsolateAddressId::kCEntryFPAddress,
isolate()));
StoreP(r6, MemOperand(ip));
StoreU64(r6, MemOperand(ip));
// Restore current context from top and clear it in debug mode.
Move(ip,
......@@ -1288,7 +1288,7 @@ void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
mov(r6, Operand(Context::kInvalidContext));
Move(ip,
ExternalReference::Create(IsolateAddressId::kContextAddress, isolate()));
StoreP(r6, MemOperand(ip));
StoreU64(r6, MemOperand(ip));
#endif
// Tear down the exit frame, pop the arguments, and return.
......@@ -1597,7 +1597,7 @@ void MacroAssembler::PushStackHandler() {
push(r0);
// Set this new handler as the current one.
StoreP(sp, MemOperand(r3));
StoreU64(sp, MemOperand(r3));
}
void MacroAssembler::PopStackHandler() {
......@@ -1607,7 +1607,7 @@ void MacroAssembler::PopStackHandler() {
pop(r4);
Move(ip,
ExternalReference::Create(IsolateAddressId::kHandlerAddress, isolate()));
StoreP(r4, MemOperand(ip));
StoreU64(r4, MemOperand(ip));
Drop(1); // Drop padding.
}
......@@ -2082,8 +2082,8 @@ void TurboAssembler::PrepareCallCFunction(int num_reg_arguments,
DCHECK(base::bits::IsPowerOfTwo(frame_alignment));
ClearRightImm(sp, sp,
Operand(base::bits::WhichPowerOfTwo(frame_alignment)));
StoreP(scratch,
MemOperand(sp, stack_passed_arguments * kSystemPointerSize));
StoreU64(scratch,
MemOperand(sp, stack_passed_arguments * kSystemPointerSize));
} else {
// Make room for stack arguments
stack_space += stack_passed_arguments;
......@@ -2158,10 +2158,10 @@ void TurboAssembler::CallCFunctionHelper(Register function,
// See x64 code for reasoning about how to address the isolate data fields.
if (root_array_available()) {
LoadPC(r0);
StoreP(r0, MemOperand(kRootRegister,
IsolateData::fast_c_call_caller_pc_offset()));
StoreP(fp, MemOperand(kRootRegister,
IsolateData::fast_c_call_caller_fp_offset()));
StoreU64(r0, MemOperand(kRootRegister,
IsolateData::fast_c_call_caller_pc_offset()));
StoreU64(fp, MemOperand(kRootRegister,
IsolateData::fast_c_call_caller_fp_offset()));
} else {
DCHECK_NOT_NULL(isolate());
Push(addr_scratch);
......@@ -2169,10 +2169,10 @@ void TurboAssembler::CallCFunctionHelper(Register function,
Move(addr_scratch,
ExternalReference::fast_c_call_caller_pc_address(isolate()));
LoadPC(r0);
StoreP(r0, MemOperand(addr_scratch));
StoreU64(r0, MemOperand(addr_scratch));
Move(addr_scratch,
ExternalReference::fast_c_call_caller_fp_address(isolate()));
StoreP(fp, MemOperand(addr_scratch));
StoreU64(fp, MemOperand(addr_scratch));
Pop(addr_scratch);
}
mtlr(scratch);
......@@ -2202,7 +2202,7 @@ void TurboAssembler::CallCFunctionHelper(Register function,
mov(zero_scratch, Operand::Zero());
if (root_array_available()) {
StoreP(
StoreU64(
zero_scratch,
MemOperand(kRootRegister, IsolateData::fast_c_call_caller_fp_offset()));
} else {
......@@ -2210,7 +2210,7 @@ void TurboAssembler::CallCFunctionHelper(Register function,
Push(addr_scratch);
Move(addr_scratch,
ExternalReference::fast_c_call_caller_fp_address(isolate()));
StoreP(zero_scratch, MemOperand(addr_scratch));
StoreU64(zero_scratch, MemOperand(addr_scratch));
Pop(addr_scratch);
}
......@@ -2730,35 +2730,33 @@ void TurboAssembler::LoadPU(Register dst, const MemOperand& mem,
}
// Store a "pointer" sized value to the memory location
void TurboAssembler::StoreP(Register src, const MemOperand& mem,
Register scratch) {
void TurboAssembler::StoreU64(Register src, const MemOperand& mem,
Register scratch) {
int offset = mem.offset();
int misaligned = (offset & 3);
if (!is_int16(offset)) {
/* cannot use d-form */
DCHECK(scratch != no_reg);
mov(scratch, Operand(offset));
StorePX(src, MemOperand(mem.ra(), scratch));
} else {
#if V8_TARGET_ARCH_PPC64
int misaligned = (offset & 3);
if (misaligned) {
// adjust base to conform to offset alignment requirements
// a suitable scratch is required here
DCHECK(scratch != no_reg);
if (scratch == r0) {
LoadIntLiteral(scratch, offset);
stdx(src, MemOperand(mem.ra(), scratch));
} else {
addi(scratch, mem.ra(), Operand((offset & 3) - 4));
std(src, MemOperand(scratch, (offset & ~3) + 4));
}
if (mem.rb() == no_reg) {
if (!is_int16(offset) || misaligned) {
/* cannot use d-form */
CHECK_NE(scratch, no_reg);
mov(scratch, Operand(offset));
stdx(src, MemOperand(mem.ra(), scratch));
} else {
std(src, mem);
}
#else
stw(src, mem);
#endif
} else {
if (offset == 0) {
stdx(src, mem);
} else if (is_int16(offset)) {
CHECK_NE(scratch, no_reg);
addi(scratch, mem.rb(), Operand(offset));
stdx(src, MemOperand(mem.ra(), scratch));
} else {
CHECK_NE(scratch, no_reg);
mov(scratch, Operand(offset));
add(scratch, scratch, mem.rb());
stdx(src, MemOperand(mem.ra(), scratch));
}
}
}
......@@ -3070,7 +3068,7 @@ void TurboAssembler::SwapP(Register src, MemOperand dst, Register scratch) {
DCHECK(!AreAliased(src, scratch));
mr(scratch, src);
LoadU64(src, dst, r0);
StoreP(scratch, dst, r0);
StoreU64(scratch, dst, r0);
}
void TurboAssembler::SwapP(MemOperand src, MemOperand dst, Register scratch_0,
......@@ -3093,15 +3091,15 @@ void TurboAssembler::SwapP(MemOperand src, MemOperand dst, Register scratch_0,
}
LoadU64(scratch_1, dst, scratch_0);
LoadU64(scratch_0, src);
StoreP(scratch_1, src);
StoreP(scratch_0, dst, scratch_1);
StoreU64(scratch_1, src);
StoreU64(scratch_0, dst, scratch_1);
} else {
LoadU64(scratch_1, dst, scratch_0);
push(scratch_1);
LoadU64(scratch_0, src, scratch_1);
StoreP(scratch_0, dst, scratch_1);
StoreU64(scratch_0, dst, scratch_1);
pop(scratch_1);
StoreP(scratch_1, src, scratch_0);
StoreU64(scratch_1, src, scratch_0);
}
}
......@@ -3331,7 +3329,7 @@ void TurboAssembler::StoreReturnAddressAndCall(Register target) {
LoadPC(r7);
bind(&start_call);
addi(r7, r7, Operand(after_call_offset));
StoreP(r7, MemOperand(sp, kStackFrameExtraParamSlot * kSystemPointerSize));
StoreU64(r7, MemOperand(sp, kStackFrameExtraParamSlot * kSystemPointerSize));
Call(dest);
DCHECK_EQ(after_call_offset - kInstrSize,
......
......@@ -39,7 +39,6 @@ Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
// These exist to provide portability between 32 and 64bit
#if V8_TARGET_ARCH_PPC64
#define LoadPUX ldux
#define StorePX stdx
#define StorePUX stdux
#define ShiftLeftImm sldi
#define ShiftRightImm srdi
......@@ -51,7 +50,6 @@ Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
#define ShiftRightArith srad
#else
#define LoadPUX lwzux
#define StorePX stwx
#define StorePUX stwux
#define ShiftLeftImm slwi
#define ShiftRightImm srwi
......@@ -148,7 +146,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
void LoadU64(Register dst, const MemOperand& mem, Register scratch = no_reg);
void LoadPU(Register dst, const MemOperand& mem, Register scratch = no_reg);
void LoadS32(Register dst, const MemOperand& mem, Register scratch = no_reg);
void StoreP(Register src, const MemOperand& mem, Register scratch = no_reg);
void StoreU64(Register src, const MemOperand& mem, Register scratch = no_reg);
void StorePU(Register src, const MemOperand& mem, Register scratch = no_reg);
void LoadDouble(DoubleRegister dst, const MemOperand& mem,
......@@ -210,32 +208,32 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// Push two registers. Pushes leftmost register first (to highest address).
void Push(Register src1, Register src2) {
StorePU(src2, MemOperand(sp, -2 * kSystemPointerSize));
StoreP(src1, MemOperand(sp, kSystemPointerSize));
StoreU64(src1, MemOperand(sp, kSystemPointerSize));
}
// Push three registers. Pushes leftmost register first (to highest address).
void Push(Register src1, Register src2, Register src3) {
StorePU(src3, MemOperand(sp, -3 * kSystemPointerSize));
StoreP(src2, MemOperand(sp, kSystemPointerSize));
StoreP(src1, MemOperand(sp, 2 * kSystemPointerSize));
StoreU64(src2, MemOperand(sp, kSystemPointerSize));
StoreU64(src1, MemOperand(sp, 2 * kSystemPointerSize));
}
// Push four registers. Pushes leftmost register first (to highest address).
void Push(Register src1, Register src2, Register src3, Register src4) {
StorePU(src4, MemOperand(sp, -4 * kSystemPointerSize));
StoreP(src3, MemOperand(sp, kSystemPointerSize));
StoreP(src2, MemOperand(sp, 2 * kSystemPointerSize));
StoreP(src1, MemOperand(sp, 3 * kSystemPointerSize));
StoreU64(src3, MemOperand(sp, kSystemPointerSize));
StoreU64(src2, MemOperand(sp, 2 * kSystemPointerSize));
StoreU64(src1, MemOperand(sp, 3 * kSystemPointerSize));
}
// Push five registers. Pushes leftmost register first (to highest address).
void Push(Register src1, Register src2, Register src3, Register src4,
Register src5) {
StorePU(src5, MemOperand(sp, -5 * kSystemPointerSize));
StoreP(src4, MemOperand(sp, kSystemPointerSize));
StoreP(src3, MemOperand(sp, 2 * kSystemPointerSize));
StoreP(src2, MemOperand(sp, 3 * kSystemPointerSize));
StoreP(src1, MemOperand(sp, 4 * kSystemPointerSize));
StoreU64(src4, MemOperand(sp, kSystemPointerSize));
StoreU64(src3, MemOperand(sp, 2 * kSystemPointerSize));
StoreU64(src2, MemOperand(sp, 3 * kSystemPointerSize));
StoreU64(src1, MemOperand(sp, 4 * kSystemPointerSize));
}
enum PushArrayOrder { kNormal, kReverse };
......@@ -738,7 +736,7 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
}
void StoreReceiver(Register rec, Register argc, Register scratch) {
StoreP(rec, MemOperand(sp, 0));
StoreU64(rec, MemOperand(sp, 0));
}
// ---------------------------------------------------------------------------
......
......@@ -1040,8 +1040,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ bind(&start_call);
__ LoadPC(kScratchReg);
__ addi(kScratchReg, kScratchReg, Operand(offset));
__ StoreP(kScratchReg,
MemOperand(fp, WasmExitFrameConstants::kCallingPCOffset));
__ StoreU64(kScratchReg,
MemOperand(fp, WasmExitFrameConstants::kCallingPCOffset));
__ mtlr(r0);
}
#endif // V8_ENABLE_WEBASSEMBLY
......@@ -1795,8 +1795,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ StoreSimd128(i.InputSimd128Register(0), MemOperand(ip, sp));
}
} else {
__ StoreP(i.InputRegister(0), MemOperand(sp, slot * kSystemPointerSize),
r0);
__ StoreU64(i.InputRegister(0),
MemOperand(sp, slot * kSystemPointerSize), r0);
}
break;
}
......@@ -4284,7 +4284,7 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
if (destination->IsRegister()) {
__ Move(g.ToRegister(destination), src);
} else {
__ StoreP(src, g.ToMemOperand(destination), r0);
__ StoreU64(src, g.ToMemOperand(destination), r0);
}
} else if (source->IsStackSlot()) {
DCHECK(destination->IsRegister() || destination->IsStackSlot());
......@@ -4294,7 +4294,7 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
} else {
Register temp = kScratchReg;
__ LoadU64(temp, src, r0);
__ StoreP(temp, g.ToMemOperand(destination), r0);
__ StoreU64(temp, g.ToMemOperand(destination), r0);
}
} else if (source->IsConstant()) {
Constant src = g.ToConstant(source);
......@@ -4361,7 +4361,7 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
break;
}
if (destination->IsStackSlot()) {
__ StoreP(dst, g.ToMemOperand(destination), r0);
__ StoreU64(dst, g.ToMemOperand(destination), r0);
}
} else {
DoubleRegister dst = destination->IsFPRegister()
......
......@@ -165,7 +165,7 @@ void RegExpMacroAssemblerPPC::AdvanceRegister(int reg, int by) {
__ LoadU64(r3, register_location(reg), r0);
__ mov(r0, Operand(by));
__ add(r3, r3, r0);
__ StoreP(r3, register_location(reg), r0);
__ StoreU64(r3, register_location(reg), r0);
}
}
......@@ -176,7 +176,7 @@ void RegExpMacroAssemblerPPC::Backtrack() {
Label next;
__ LoadU64(r3, MemOperand(frame_pointer(), kBacktrackCount), r0);
__ addi(r3, r3, Operand(1));
__ StoreP(r3, MemOperand(frame_pointer(), kBacktrackCount), r0);
__ StoreU64(r3, MemOperand(frame_pointer(), kBacktrackCount), r0);
__ mov(r0, Operand(backtrack_limit()));
__ cmp(r3, r0);
__ bne(&next);
......@@ -759,7 +759,7 @@ Handle<HeapObject> RegExpMacroAssemblerPPC::GetCode(Handle<String> source) {
}
// Store this value in a local variable, for use when clearing
// position registers.
__ StoreP(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
__ StoreU64(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
// Initialize code pointer register
__ mov(code_pointer(), Operand(masm_->CodeObject()));
......@@ -792,7 +792,7 @@ Handle<HeapObject> RegExpMacroAssemblerPPC::GetCode(Handle<String> source) {
__ bdnz(&init_loop);
} else {
for (int i = 0; i < num_saved_registers_; i++) {
__ StoreP(r3, register_location(i), r0);
__ StoreU64(r3, register_location(i), r0);
}
}
}
......@@ -855,7 +855,7 @@ Handle<HeapObject> RegExpMacroAssemblerPPC::GetCode(Handle<String> source) {
__ LoadU64(r5, MemOperand(frame_pointer(), kRegisterOutput));
// Increment success counter.
__ addi(r3, r3, Operand(1));
__ StoreP(r3, MemOperand(frame_pointer(), kSuccessfulCaptures));
__ StoreU64(r3, MemOperand(frame_pointer(), kSuccessfulCaptures));
// Capture results have been stored, so the number of remaining global
// output registers is reduced by the number of stored captures.
__ subi(r4, r4, Operand(num_saved_registers_));
......@@ -863,10 +863,10 @@ Handle<HeapObject> RegExpMacroAssemblerPPC::GetCode(Handle<String> source) {
__ cmpi(r4, Operand(num_saved_registers_));
__ blt(&return_r3);
__ StoreP(r4, MemOperand(frame_pointer(), kNumOutputRegisters));
__ StoreU64(r4, MemOperand(frame_pointer(), kNumOutputRegisters));
// Advance the location for output.
__ addi(r5, r5, Operand(num_saved_registers_ * kIntSize));
__ StoreP(r5, MemOperand(frame_pointer(), kRegisterOutput));
__ StoreU64(r5, MemOperand(frame_pointer(), kRegisterOutput));
// Prepare r3 to initialize registers with its value in the next run.
__ LoadU64(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
......@@ -1022,7 +1022,7 @@ void RegExpMacroAssemblerPPC::PopCurrentPosition() {
void RegExpMacroAssemblerPPC::PopRegister(int register_index) {
Pop(r3);
__ StoreP(r3, register_location(register_index), r0);
__ StoreU64(r3, register_location(register_index), r0);
}
......@@ -1074,7 +1074,7 @@ void RegExpMacroAssemblerPPC::SetCurrentPositionFromEnd(int by) {
void RegExpMacroAssemblerPPC::SetRegister(int register_index, int to) {
DCHECK(register_index >= num_saved_registers_); // Reserved for positions!
__ mov(r3, Operand(to));
__ StoreP(r3, register_location(register_index), r0);
__ StoreU64(r3, register_location(register_index), r0);
}
......@@ -1087,11 +1087,11 @@ bool RegExpMacroAssemblerPPC::Succeed() {
void RegExpMacroAssemblerPPC::WriteCurrentPositionToRegister(int reg,
int cp_offset) {
if (cp_offset == 0) {
__ StoreP(current_input_offset(), register_location(reg), r0);
__ StoreU64(current_input_offset(), register_location(reg), r0);
} else {
__ mov(r0, Operand(cp_offset * char_size()));
__ add(r3, current_input_offset(), r0);
__ StoreP(r3, register_location(reg), r0);
__ StoreU64(r3, register_location(reg), r0);
}
}
......@@ -1100,7 +1100,7 @@ void RegExpMacroAssemblerPPC::ClearRegisters(int reg_from, int reg_to) {
DCHECK(reg_from <= reg_to);
__ LoadU64(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
for (int reg = reg_from; reg <= reg_to; reg++) {
__ StoreP(r3, register_location(reg), r0);
__ StoreU64(r3, register_location(reg), r0);
}
}
......@@ -1108,7 +1108,7 @@ void RegExpMacroAssemblerPPC::ClearRegisters(int reg_from, int reg_to) {
void RegExpMacroAssemblerPPC::WriteStackPointerToRegister(int reg) {
__ LoadU64(r4, MemOperand(frame_pointer(), kStackHighEnd));
__ sub(r3, backtrack_stackpointer(), r4);
__ StoreP(r3, register_location(reg), r0);
__ StoreU64(r3, register_location(reg), r0);
}
......@@ -1134,8 +1134,8 @@ void RegExpMacroAssemblerPPC::CallCheckStackGuardState(Register scratch) {
DCHECK(base::bits::IsPowerOfTwo(frame_alignment));
__ ClearRightImm(sp, sp,
Operand(base::bits::WhichPowerOfTwo(frame_alignment)));
__ StoreP(scratch,
MemOperand(sp, stack_passed_arguments * kSystemPointerSize));
__ StoreU64(scratch,
MemOperand(sp, stack_passed_arguments * kSystemPointerSize));
} else {
// Make room for stack arguments
stack_space += stack_passed_arguments;
......
......@@ -352,7 +352,7 @@ void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) {
// Special straight-line code for up to nine words. Generates one
// instruction per word.
for (int offset = 4; offset <= size; offset += 4) {
StoreP(r0, liftoff::GetHalfStackSlot(start + offset, kLowWord));
StoreU64(r0, liftoff::GetHalfStackSlot(start + offset, kLowWord));
}
} else {
// General case for bigger counts (9 instructions).
......@@ -364,7 +364,7 @@ void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) {
Label loop;
bind(&loop);
StoreP(r0, MemOperand(r0));
StoreU64(r0, MemOperand(r0));
addi(r0, r0, Operand(kSystemPointerSize));
cmp(r4, r5);
bne(&loop);
......
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