[ptr-compr][x64] TurboFan support for compressing stores

This CL also stops using checked decompression for tagged values
in TurboFan backend.

Bug: v8:7703
Change-Id: I4ab7670301924a365a10bb78f43bce0bbf785862
Reviewed-on: https://chromium-review.googlesource.com/c/1459638Reviewed-by: Jaroslav Sevcik <jarin@chromium.org>
Commit-Queue: Igor Sheludko <ishell@chromium.org>
Cr-Commit-Position: refs/heads/master@{#59462}

src/compiler/backend/x64/code-generator-x64.cc

@@ -1015,7 +1015,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       auto ool = new (zone())
           OutOfLineRecordWrite(this, object, operand, value, scratch0, scratch1,
                                mode, DetermineStubCallMode());
-      __ movq(operand, value);
+      __ StoreTaggedField(operand, value);
       __ CheckPageFlag(object, scratch0,
                        MemoryChunk::kPointersFromHereAreInterestingMask,
                        not_zero, ool->entry());
@@ -1927,21 +1927,29 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       break;
     case kX64MovqDecompressTaggedSigned: {
       CHECK(instr->HasOutput());
-      __ DecompressTaggedSigned(i.OutputRegister(), i.MemoryOperand(),
-                                DEBUG_BOOL ? i.TempRegister(0) : no_reg);
+      __ DecompressTaggedSigned(i.OutputRegister(), i.MemoryOperand());
       break;
     }
     case kX64MovqDecompressTaggedPointer: {
       CHECK(instr->HasOutput());
-      __ DecompressTaggedPointer(i.OutputRegister(), i.MemoryOperand(),
-                                 DEBUG_BOOL ? i.TempRegister(0) : no_reg);
+      __ DecompressTaggedPointer(i.OutputRegister(), i.MemoryOperand());
       break;
     }
     case kX64MovqDecompressAnyTagged: {
       CHECK(instr->HasOutput());
       __ DecompressAnyTagged(i.OutputRegister(), i.MemoryOperand(),
-                             i.TempRegister(0),
-                             DEBUG_BOOL ? i.TempRegister(1) : no_reg);
+                             i.TempRegister(0));
+      break;
+    }
+    case kX64MovqCompressTagged: {
+      CHECK(!instr->HasOutput());
+      size_t index = 0;
+      Operand operand = i.MemoryOperand(&index);
+      if (HasImmediateInput(instr, index)) {
+        __ StoreTaggedField(operand, i.InputImmediate(index));
+      } else {
+        __ StoreTaggedField(operand, i.InputRegister(index));
+      }
       break;
     }
     case kX64Movq:

src/compiler/backend/x64/instruction-codes-x64.h

@@ -135,6 +135,7 @@ namespace compiler {
   V(X64MovqDecompressTaggedSigned)        \
   V(X64MovqDecompressTaggedPointer)       \
   V(X64MovqDecompressAnyTagged)           \
+  V(X64MovqCompressTagged)                \
   V(X64Movq)                              \
   V(X64Movsd)                             \
   V(X64Movss)                             \

src/compiler/backend/x64/instruction-scheduler-x64.cc

@@ -306,6 +306,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kX64MovqDecompressTaggedSigned:
     case kX64MovqDecompressTaggedPointer:
     case kX64MovqDecompressAnyTagged:
+    case kX64MovqCompressTagged:
     case kX64Movq:
     case kX64Movsd:
     case kX64Movss:

src/compiler/backend/x64/instruction-selector-x64.cc

@@ -69,7 +69,10 @@ class X64OperandGenerator final : public OperandGenerator {
       case kX64Push:
       case kX64Cmp:
       case kX64Test:
-        return rep == MachineRepresentation::kWord64 || IsAnyTagged(rep);
+        // When pointer compression is enabled 64-bit memory operands can't be
+        // used for tagged values.
+        return rep == MachineRepresentation::kWord64 ||
+               (!COMPRESS_POINTERS_BOOL && IsAnyTagged(rep));
       case kX64And32:
       case kX64Or32:
       case kX64Xor32:
@@ -77,7 +80,10 @@ class X64OperandGenerator final : public OperandGenerator {
       case kX64Sub32:
       case kX64Cmp32:
       case kX64Test32:
-        return rep == MachineRepresentation::kWord32;
+        // When pointer compression is enabled 32-bit memory operands can be
+        // used for tagged values.
+        return rep == MachineRepresentation::kWord32 ||
+               (COMPRESS_POINTERS_BOOL && IsAnyTagged(rep));
       case kX64Cmp16:
       case kX64Test16:
         return rep == MachineRepresentation::kWord16;
@@ -280,6 +286,9 @@ ArchOpcode GetStoreOpcode(StoreRepresentation store_rep) {
     case MachineRepresentation::kTaggedSigned:   // Fall through.
     case MachineRepresentation::kTaggedPointer:  // Fall through.
     case MachineRepresentation::kTagged:         // Fall through.
+#ifdef V8_COMPRESS_POINTERS
+      return kX64MovqCompressTagged;
+#endif
     case MachineRepresentation::kWord64:
       return kX64Movq;
       break;
@@ -319,19 +328,10 @@ void InstructionSelector::VisitLoad(Node* node) {
 
   ArchOpcode opcode = GetLoadOpcode(load_rep);
   size_t temp_count = 0;
-  InstructionOperand temps[2];
-#ifdef V8_COMPRESS_POINTERS
-  if (opcode == kX64MovqDecompressAnyTagged) {
-    temps[temp_count++] = g.TempRegister();
-  }
-#ifdef DEBUG
-  if (opcode == kX64MovqDecompressTaggedSigned ||
-      opcode == kX64MovqDecompressTaggedPointer ||
-      opcode == kX64MovqDecompressAnyTagged) {
+  InstructionOperand temps[1];
+  if (COMPRESS_POINTERS_BOOL && opcode == kX64MovqDecompressAnyTagged) {
     temps[temp_count++] = g.TempRegister();
   }
-#endif  // DEBUG
-#endif  // V8_COMPRESS_POINTERS
   DCHECK_LE(temp_count, arraysize(temps));
   InstructionOperand outputs[] = {g.DefineAsRegister(node)};
   InstructionOperand inputs[3];
@@ -1692,6 +1692,15 @@ InstructionCode TryNarrowOpcodeSize(InstructionCode opcode, Node* left,
           return kX64Cmp16;
         }
         break;
+#ifdef V8_COMPRESS_POINTERS
+      case MachineRepresentation::kTaggedSigned:
+      case MachineRepresentation::kTaggedPointer:
+      case MachineRepresentation::kTagged:
+        // When pointer compression is enabled the lower 32-bits uniquely
+        // identify tagged value.
+        if (opcode == kX64Cmp) return kX64Cmp32;
+        break;
+#endif
       default:
         break;
     }

src/x64/macro-assembler-x64.h

@@ -511,11 +511,12 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   void StoreTaggedField(Operand dst_field_operand, Register value);
 
   void DecompressTaggedSigned(Register destination, Operand field_operand,
-                              Register scratch_for_debug);
+                              Register scratch_for_debug = no_reg);
   void DecompressTaggedPointer(Register destination, Operand field_operand,
-                               Register scratch_for_debug);
+                               Register scratch_for_debug = no_reg);
   void DecompressAnyTagged(Register destination, Operand field_operand,
-                           Register scratch, Register scratch_for_debug);
+                           Register scratch,
+                           Register scratch_for_debug = no_reg);
 
  protected:
   static const int kSmiShift = kSmiTagSize + kSmiShiftSize;