Commit 8138bb5b authored by Dusan Milosavljevic's avatar Dusan Milosavljevic

MIPS: Improve pushing arguments on stack.

TEST=
BUG=
R=paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/769283002

Cr-Commit-Position: refs/heads/master@{#25636}
parent 57957b48
......@@ -462,6 +462,16 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kMipsPush:
__ Push(i.InputRegister(0));
break;
case kMipsStackClaim: {
int words = MiscField::decode(instr->opcode());
__ Subu(sp, sp, Operand(words << kPointerSizeLog2));
break;
}
case kMipsStoreToStackSlot: {
int slot = MiscField::decode(instr->opcode());
__ sw(i.InputRegister(0), MemOperand(sp, slot << kPointerSizeLog2));
break;
}
case kMipsStoreWriteBarrier: {
Register object = i.InputRegister(0);
Register index = i.InputRegister(1);
......
......@@ -59,6 +59,8 @@ namespace compiler {
V(MipsLdc1) \
V(MipsSdc1) \
V(MipsPush) \
V(MipsStoreToStackSlot) \
V(MipsStackClaim) \
V(MipsStoreWriteBarrier)
......
......@@ -446,15 +446,17 @@ void InstructionSelector::VisitCall(Node* node) {
// Compute InstructionOperands for inputs and outputs.
InitializeCallBuffer(node, &buffer, true, false);
// TODO(dcarney): might be possible to use claim/poke instead
// Push any stack arguments.
// Possibly align stack here for functions.
int push_count = buffer.pushed_nodes.size();
if (push_count > 0) {
Emit(kMipsStackClaim | MiscField::encode(push_count), NULL);
}
int slot = buffer.pushed_nodes.size() - 1;
for (NodeVectorRIter input = buffer.pushed_nodes.rbegin();
input != buffer.pushed_nodes.rend(); input++) {
// TODO(plind): inefficient for MIPS, use MultiPush here.
// - Also need to align the stack. See arm64.
// - Maybe combine with arg slot stuff in DirectCEntry stub.
Emit(kMipsPush, NULL, g.UseRegister(*input));
Emit(kMipsStoreToStackSlot | MiscField::encode(slot), NULL,
g.UseRegister(*input));
slot--;
}
// Select the appropriate opcode based on the call type.
......
......@@ -459,6 +459,16 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kMips64Push:
__ Push(i.InputRegister(0));
break;
case kMips64StackClaim: {
int words = MiscField::decode(instr->opcode());
__ Dsubu(sp, sp, Operand(words << kPointerSizeLog2));
break;
}
case kMips64StoreToStackSlot: {
int slot = MiscField::decode(instr->opcode());
__ sd(i.InputRegister(0), MemOperand(sp, slot << kPointerSizeLog2));
break;
}
case kMips64StoreWriteBarrier:
Register object = i.InputRegister(0);
Register index = i.InputRegister(1);
......
......@@ -77,6 +77,8 @@ namespace compiler {
V(Mips64Ldc1) \
V(Mips64Sdc1) \
V(Mips64Push) \
V(Mips64StoreToStackSlot) \
V(Mips64StackClaim) \
V(Mips64StoreWriteBarrier)
......
......@@ -643,14 +643,16 @@ void InstructionSelector::VisitCall(Node* node) {
// Compute InstructionOperands for inputs and outputs.
InitializeCallBuffer(node, &buffer, true, false);
// TODO(dcarney): might be possible to use claim/poke instead
// Push any stack arguments.
int push_count = buffer.pushed_nodes.size();
if (push_count > 0) {
Emit(kMips64StackClaim | MiscField::encode(push_count), NULL);
}
int slot = buffer.pushed_nodes.size() - 1;
for (NodeVectorRIter input = buffer.pushed_nodes.rbegin();
input != buffer.pushed_nodes.rend(); input++) {
// TODO(plind): inefficient for MIPS, use MultiPush here.
// - Also need to align the stack. See arm64.
// - Maybe combine with arg slot stuff in DirectCEntry stub.
Emit(kMips64Push, NULL, g.UseRegister(*input));
Emit(kMips64StoreToStackSlot | MiscField::encode(slot), NULL,
g.UseRegister(*input));
slot--;
}
// Select the appropriate opcode based on the call type.
......
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