Revert "Clean up macros"

This reverts commit 08b26f53.

Reason for revert: Breaks tree https://ci.chromium.org/p/v8/builders/ci/V8%20Linux%20-%20noi18n%20-%20debug/29046

Original change's description:
> Clean up macros
> 
> Move some instruction definitions into sse-instr, which is used to
> generate some disasm tests, so we can remove some cases there.
> 
> Bug: v8:9810
> Change-Id: I0615ec823396da08bc5d234cf1dabca6afd3f052
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1866965
> Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
> Commit-Queue: Zhi An Ng <zhin@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#64441}

TBR=gdeepti@chromium.org,zhin@chromium.org

Change-Id: I067c1fdbaa6eb2a08c0fcb7c8885d72f073a8818
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: v8:9810
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1873195Reviewed-by: Zhi An Ng <zhin@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64443}

src/codegen/ia32/assembler-ia32.cc

@@ -2495,6 +2495,14 @@ void Assembler::psllq(XMMRegister reg, uint8_t shift) {
   EMIT(shift);
 }
 
+void Assembler::psllq(XMMRegister dst, XMMRegister src) {
+  EnsureSpace ensure_space(this);
+  EMIT(0x66);
+  EMIT(0x0F);
+  EMIT(0xF3);
+  emit_sse_operand(dst, src);
+}
+
 void Assembler::psrlq(XMMRegister reg, uint8_t shift) {
   EnsureSpace ensure_space(this);
   EMIT(0x66);
@@ -2504,6 +2512,14 @@ void Assembler::psrlq(XMMRegister reg, uint8_t shift) {
   EMIT(shift);
 }
 
+void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
+  EnsureSpace ensure_space(this);
+  EMIT(0x66);
+  EMIT(0x0F);
+  EMIT(0xD3);
+  emit_sse_operand(dst, src);
+}
+
 void Assembler::pshufhw(XMMRegister dst, Operand src, uint8_t shuffle) {
   EnsureSpace ensure_space(this);
   EMIT(0xF3);
@@ -2782,12 +2798,6 @@ void Assembler::vpslld(XMMRegister dst, XMMRegister src, uint8_t imm8) {
   EMIT(imm8);
 }
 
-void Assembler::vpsllq(XMMRegister dst, XMMRegister src, uint8_t imm8) {
-  XMMRegister iop = XMMRegister::from_code(6);
-  vinstr(0x73, iop, dst, Operand(src), k66, k0F, kWIG);
-  EMIT(imm8);
-}
-
 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, uint8_t imm8) {
   XMMRegister iop = XMMRegister::from_code(2);
   vinstr(0x71, iop, dst, Operand(src), k66, k0F, kWIG);

src/codegen/ia32/assembler-ia32.h

@@ -996,7 +996,9 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
   void psraw(XMMRegister reg, uint8_t shift);
   void psrad(XMMRegister reg, uint8_t shift);
   void psllq(XMMRegister reg, uint8_t shift);
+  void psllq(XMMRegister dst, XMMRegister src);
   void psrlq(XMMRegister reg, uint8_t shift);
+  void psrlq(XMMRegister dst, XMMRegister src);
 
   void pshufhw(XMMRegister dst, XMMRegister src, uint8_t shuffle) {
     pshufhw(dst, Operand(src), shuffle);
@@ -1330,7 +1332,6 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
 
   void vpsllw(XMMRegister dst, XMMRegister src, uint8_t imm8);
   void vpslld(XMMRegister dst, XMMRegister src, uint8_t imm8);
-  void vpsllq(XMMRegister dst, XMMRegister src, uint8_t imm8);
   void vpsrlw(XMMRegister dst, XMMRegister src, uint8_t imm8);
   void vpsrld(XMMRegister dst, XMMRegister src, uint8_t imm8);
   void vpsraw(XMMRegister dst, XMMRegister src, uint8_t imm8);

src/codegen/ia32/sse-instr.h

@@ -31,12 +31,10 @@
   V(por, 66, 0F, EB)             \
   V(psllw, 66, 0F, F1)           \
   V(pslld, 66, 0F, F2)           \
-  V(psllq, 66, 0F, F3)           \
   V(psraw, 66, 0F, E1)           \
   V(psrad, 66, 0F, E2)           \
   V(psrlw, 66, 0F, D1)           \
   V(psrld, 66, 0F, D2)           \
-  V(psrlq, 66, 0F, D3)           \
   V(psubb, 66, 0F, F8)           \
   V(psubw, 66, 0F, F9)           \
   V(psubd, 66, 0F, FA)           \

test/cctest/test-disasm-ia32.cc

@@ -535,7 +535,9 @@ TEST(DisasmIa320) {
     __ psraw(xmm0, 17);
     __ psrad(xmm0, 17);
     __ psllq(xmm0, 17);
+    __ psllq(xmm0, xmm1);
     __ psrlq(xmm0, 17);
+    __ psrlq(xmm0, xmm1);
 
     __ pshufhw(xmm5, xmm1, 5);
     __ pshufhw(xmm5, Operand(edx, 4), 5);
@@ -733,7 +735,6 @@ TEST(DisasmIa320) {
 
       __ vpsllw(xmm0, xmm7, 21);
       __ vpslld(xmm0, xmm7, 21);
-      __ vpsllq(xmm0, xmm7, 21);
       __ vpsrlw(xmm0, xmm7, 21);
       __ vpsrld(xmm0, xmm7, 21);
       __ vpsrlq(xmm0, xmm7, 21);