PPC/s390: [Turbofan]: Use new MachineTypes in access-builder.

Port 56429fc1

Original Commit Message:

    Introduced MachineType::TaggedSigned() and TaggedPointer().

    The idea is to quit using the representational dimension of Type, and
    instead encode this information in the MachineRepresentation (itself
    lightly wrapped in MachineType, along with MachineSemantic).

    There are three parts to the whole change:

    1) Places that set the machine representation - constant nodes, loads nad
       stores, global object and native context specialization.

    2) Places that propagate type/representation - this is representation
       inference (aka simplified lowering). At the end of this process we
       expect to have a MachineRepresentation for every node. An interesting
       part of this is phi merging.

    3) Places that examine representation - WriteBarrier elimination does this.
       Currently it's looking at the Type representation dimension, but as
       a part of this change (or in a soon-to-follow change) it can simply
       examine the MachineRepresentation.

R=mvstanton@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N

Review-Url: https://codereview.chromium.org/2662223003
Cr-Commit-Position: refs/heads/master@{#42817}

src/compiler/ppc/instruction-selector-ppc.cc

@@ -248,7 +248,7 @@ void InstructionSelector::VisitStore(Node* node) {
   MachineRepresentation rep = store_rep.representation();
 
   if (write_barrier_kind != kNoWriteBarrier) {
-    DCHECK_EQ(MachineRepresentation::kTagged, rep);
+    DCHECK(CanBeTaggedPointer(rep));
     AddressingMode addressing_mode;
     InstructionOperand inputs[3];
     size_t input_count = 0;

src/compiler/s390/instruction-selector-s390.cc

@@ -601,7 +601,7 @@ void InstructionSelector::VisitStore(Node* node) {
   MachineRepresentation rep = store_rep.representation();
 
   if (write_barrier_kind != kNoWriteBarrier) {
-    DCHECK_EQ(MachineRepresentation::kTagged, rep);
+    DCHECK(CanBeTaggedPointer(rep));
     AddressingMode addressing_mode;
     InstructionOperand inputs[3];
     size_t input_count = 0;