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Commit 7b3875d1 authored by aseemgarg's avatar aseemgarg Committed by Commit bot
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[wasm] fix Simd ExtractLane to take immediate instead of param 

BUG=v8:4124
TEST:test-run-wasm-simd
R=titzer@chromium.org,bradnelson@chromium.org,gdeepti@chromium.org

Review-Url: https://codereview.chromium.org/2300753005
Cr-Commit-Position: refs/heads/master@{#39288}
parent 20d427a1
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Showing with 204 additions and 169 deletions
src/compiler/wasm-compiler.cc
View file @ 7b3875d1
...@@ -2903,9 +2903,6 @@ Node* WasmGraphBuilder::DefaultS128Value() { ...@@ -2903,9 +2903,6 @@ Node* WasmGraphBuilder::DefaultS128Value() {
Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode, Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode,
const NodeVector& inputs) { const NodeVector& inputs) {
switch (opcode) { switch (opcode) {
case wasm::kExprI32x4ExtractLane:
return graph()->NewNode(jsgraph()->machine()->Int32x4ExtractLane(),
inputs[0], inputs[1]);
case wasm::kExprI32x4Splat: case wasm::kExprI32x4Splat:
return graph()->NewNode(jsgraph()->machine()->CreateInt32x4(), inputs[0], return graph()->NewNode(jsgraph()->machine()->CreateInt32x4(), inputs[0],
inputs[0], inputs[0], inputs[0]); inputs[0], inputs[0], inputs[0]);
...@@ -2914,6 +2911,17 @@ Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode, ...@@ -2914,6 +2911,17 @@ Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode,
} }
} }
Node* WasmGraphBuilder::SimdExtractLane(wasm::WasmOpcode opcode, uint8_t lane,
Node* input) {
switch (opcode) {
case wasm::kExprI32x4ExtractLane:
return graph()->NewNode(jsgraph()->machine()->Int32x4ExtractLane(), input,
Int32Constant(lane));
default:
return graph()->NewNode(UnsupportedOpcode(opcode), nullptr);
}
}
static void RecordFunctionCompilation(CodeEventListener::LogEventsAndTags tag, static void RecordFunctionCompilation(CodeEventListener::LogEventsAndTags tag,
Isolate* isolate, Handle<Code> code, Isolate* isolate, Handle<Code> code,
const char* message, uint32_t index, const char* message, uint32_t index,
......
src/compiler/wasm-compiler.h
View file @ 7b3875d1
...@@ -198,6 +198,7 @@ class WasmGraphBuilder { ...@@ -198,6 +198,7 @@ class WasmGraphBuilder {
Node* DefaultS128Value(); Node* DefaultS128Value();
Node* SimdOp(wasm::WasmOpcode opcode, const NodeVector& inputs); Node* SimdOp(wasm::WasmOpcode opcode, const NodeVector& inputs);
Node* SimdExtractLane(wasm::WasmOpcode opcode, uint8_t lane, Node* input);
private: private:
static const int kDefaultBufferSize = 16; static const int kDefaultBufferSize = 16;
......
src/wasm/ast-decoder.cc
View file @ 7b3875d1
...@@ -386,8 +386,12 @@ class WasmDecoder : public Decoder { ...@@ -386,8 +386,12 @@ class WasmDecoder : public Decoder {
FOREACH_SIMPLE_OPCODE(DECLARE_OPCODE_CASE) FOREACH_SIMPLE_OPCODE(DECLARE_OPCODE_CASE)
FOREACH_SIMPLE_MEM_OPCODE(DECLARE_OPCODE_CASE) FOREACH_SIMPLE_MEM_OPCODE(DECLARE_OPCODE_CASE)
FOREACH_ASMJS_COMPAT_OPCODE(DECLARE_OPCODE_CASE) FOREACH_ASMJS_COMPAT_OPCODE(DECLARE_OPCODE_CASE)
FOREACH_SIMD_OPCODE(DECLARE_OPCODE_CASE) FOREACH_SIMD_0_OPERAND_OPCODE(DECLARE_OPCODE_CASE)
#undef DECLARE_OPCODE_CASE #undef DECLARE_OPCODE_CASE
#define DECLARE_OPCODE_CASE(name, opcode, sig) case kExpr##name:
FOREACH_SIMD_1_OPERAND_OPCODE(DECLARE_OPCODE_CASE)
#undef DECLARE_OPCODE_CASE
return 1;
default: default:
UNREACHABLE(); UNREACHABLE();
return 0; return 0;
...@@ -456,7 +460,10 @@ class WasmDecoder : public Decoder { ...@@ -456,7 +460,10 @@ class WasmDecoder : public Decoder {
ReturnArityOperand operand(this, pc); ReturnArityOperand operand(this, pc);
return 1 + operand.length; return 1 + operand.length;
} }
#define DECLARE_OPCODE_CASE(name, opcode, sig) case kExpr##name:
FOREACH_SIMD_0_OPERAND_OPCODE(DECLARE_OPCODE_CASE) { return 2; }
FOREACH_SIMD_1_OPERAND_OPCODE(DECLARE_OPCODE_CASE) { return 3; }
#undef DECLARE_OPCODE_CASE
default: default:
return 1; return 1;
} }
...@@ -1275,7 +1282,7 @@ class WasmFullDecoder : public WasmDecoder { ...@@ -1275,7 +1282,7 @@ class WasmFullDecoder : public WasmDecoder {
opcode = static_cast<WasmOpcode>(opcode << 8 | simd_index); opcode = static_cast<WasmOpcode>(opcode << 8 | simd_index);
TRACE(" @%-4d #%02x #%02x:%-20s|", startrel(pc_), kSimdPrefix, TRACE(" @%-4d #%02x #%02x:%-20s|", startrel(pc_), kSimdPrefix,
simd_index, WasmOpcodes::ShortOpcodeName(opcode)); simd_index, WasmOpcodes::ShortOpcodeName(opcode));
DecodeSimdOpcode(opcode); len += DecodeSimdOpcode(opcode);
break; break;
} }
default: default:
...@@ -1406,15 +1413,36 @@ class WasmFullDecoder : public WasmDecoder { ...@@ -1406,15 +1413,36 @@ class WasmFullDecoder : public WasmDecoder {
return 1 + operand.length; return 1 + operand.length;
} }
void DecodeSimdOpcode(WasmOpcode opcode) { unsigned DecodeSimdOpcode(WasmOpcode opcode) {
FunctionSig* sig = WasmOpcodes::Signature(opcode); unsigned len = 0;
compiler::NodeVector inputs(sig->parameter_count(), zone_); switch (opcode) {
for (size_t i = sig->parameter_count(); i > 0; i--) { case kExprI32x4ExtractLane: {
Value val = Pop(static_cast<int>(i - 1), sig->GetParam(i - 1)); uint8_t lane = this->checked_read_u8(pc_, 2, "lane number");
inputs[i - 1] = val.node; if (lane < 0 || lane > 3) {
error(pc_, pc_ + 2, "invalid extract lane value");
}
TFNode* input = Pop(0, LocalType::kSimd128).node;
TFNode* node = BUILD(SimdExtractLane, opcode, lane, input);
Push(LocalType::kWord32, node);
len++;
break;
}
default: {
FunctionSig* sig = WasmOpcodes::Signature(opcode);
if (sig != nullptr) {
compiler::NodeVector inputs(sig->parameter_count(), zone_);
for (size_t i = sig->parameter_count(); i > 0; i--) {
Value val = Pop(static_cast<int>(i - 1), sig->GetParam(i - 1));
inputs[i - 1] = val.node;
}
TFNode* node = BUILD(SimdOp, opcode, inputs);
Push(GetReturnType(sig), node);
} else {
error(pc_, pc_, "invalid simd opcode");
}
}
} }
TFNode* node = BUILD(SimdOp, opcode, inputs); return len;
Push(GetReturnType(sig), node);
} }
void DispatchToTargets(Control* next_block, const Value& val) { void DispatchToTargets(Control* next_block, const Value& val) {
......
src/wasm/wasm-macro-gen.h
View file @ 7b3875d1
...@@ -589,8 +589,8 @@ class LocalDeclEncoder { ...@@ -589,8 +589,8 @@ class LocalDeclEncoder {
// Simd Operations. // Simd Operations.
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
#define WASM_SIMD_I32x4_SPLAT(x) x, kSimdPrefix, kExprI32x4Splat & 0xff #define WASM_SIMD_I32x4_SPLAT(x) x, kSimdPrefix, kExprI32x4Splat & 0xff
#define WASM_SIMD_I32x4_EXTRACT_LANE(x, y) \ #define WASM_SIMD_I32x4_EXTRACT_LANE(lane, x) \
x, y, kSimdPrefix, kExprI32x4ExtractLane & 0xff x, kSimdPrefix, kExprI32x4ExtractLane & 0xff, static_cast<byte>(lane)
#define SIG_ENTRY_v_v kWasmFunctionTypeForm, 0, 0 #define SIG_ENTRY_v_v kWasmFunctionTypeForm, 0, 0
#define SIZEOF_SIG_ENTRY_v_v 3 #define SIZEOF_SIG_ENTRY_v_v 3
......
src/wasm/wasm-opcodes.cc
View file @ 7b3875d1
...@@ -100,7 +100,7 @@ static void InitSigTables() { ...@@ -100,7 +100,7 @@ static void InitSigTables() {
#define SET_SIG_TABLE(name, opcode, sig) \ #define SET_SIG_TABLE(name, opcode, sig) \
simd_index = opcode & 0xff; \ simd_index = opcode & 0xff; \
kSimdExprSigTable[simd_index] = static_cast<int>(kSigEnum_##sig) + 1; kSimdExprSigTable[simd_index] = static_cast<int>(kSigEnum_##sig) + 1;
FOREACH_SIMD_OPCODE(SET_SIG_TABLE) FOREACH_SIMD_0_OPERAND_OPCODE(SET_SIG_TABLE)
#undef SET_SIG_TABLE #undef SET_SIG_TABLE
} }
......
src/wasm/wasm-opcodes.h
View file @ 7b3875d1
...@@ -273,141 +273,144 @@ const WasmCodePosition kNoCodePosition = -1; ...@@ -273,141 +273,144 @@ const WasmCodePosition kNoCodePosition = -1;
V(I32AsmjsSConvertF64, 0xe2, i_d) \ V(I32AsmjsSConvertF64, 0xe2, i_d) \
V(I32AsmjsUConvertF64, 0xe3, i_d) V(I32AsmjsUConvertF64, 0xe3, i_d)
#define FOREACH_SIMD_OPCODE(V) \ #define FOREACH_SIMD_0_OPERAND_OPCODE(V) \
V(F32x4Splat, 0xe500, s_f) \ V(F32x4Splat, 0xe500, s_f) \
V(F32x4ExtractLane, 0xe501, f_si) \ V(F32x4ReplaceLane, 0xe502, s_sif) \
V(F32x4ReplaceLane, 0xe502, s_sif) \ V(F32x4Abs, 0xe503, s_s) \
V(F32x4Abs, 0xe503, s_s) \ V(F32x4Neg, 0xe504, s_s) \
V(F32x4Neg, 0xe504, s_s) \ V(F32x4Sqrt, 0xe505, s_s) \
V(F32x4Sqrt, 0xe505, s_s) \ V(F32x4RecipApprox, 0xe506, s_s) \
V(F32x4RecipApprox, 0xe506, s_s) \ V(F32x4SqrtApprox, 0xe507, s_s) \
V(F32x4SqrtApprox, 0xe507, s_s) \ V(F32x4Add, 0xe508, s_ss) \
V(F32x4Add, 0xe508, s_ss) \ V(F32x4Sub, 0xe509, s_ss) \
V(F32x4Sub, 0xe509, s_ss) \ V(F32x4Mul, 0xe50a, s_ss) \
V(F32x4Mul, 0xe50a, s_ss) \ V(F32x4Div, 0xe50b, s_ss) \
V(F32x4Div, 0xe50b, s_ss) \ V(F32x4Min, 0xe50c, s_ss) \
V(F32x4Min, 0xe50c, s_ss) \ V(F32x4Max, 0xe50d, s_ss) \
V(F32x4Max, 0xe50d, s_ss) \ V(F32x4MinNum, 0xe50e, s_ss) \
V(F32x4MinNum, 0xe50e, s_ss) \ V(F32x4MaxNum, 0xe50f, s_ss) \
V(F32x4MaxNum, 0xe50f, s_ss) \ V(F32x4Eq, 0xe510, s_ss) \
V(F32x4Eq, 0xe510, s_ss) \ V(F32x4Ne, 0xe511, s_ss) \
V(F32x4Ne, 0xe511, s_ss) \ V(F32x4Lt, 0xe512, s_ss) \
V(F32x4Lt, 0xe512, s_ss) \ V(F32x4Le, 0xe513, s_ss) \
V(F32x4Le, 0xe513, s_ss) \ V(F32x4Gt, 0xe514, s_ss) \
V(F32x4Gt, 0xe514, s_ss) \ V(F32x4Ge, 0xe515, s_ss) \
V(F32x4Ge, 0xe515, s_ss) \ V(F32x4Select, 0xe516, s_sss) \
V(F32x4Select, 0xe516, s_sss) \ V(F32x4Swizzle, 0xe517, s_s) \
V(F32x4Swizzle, 0xe517, s_s) \ V(F32x4Shuffle, 0xe518, s_ss) \
V(F32x4Shuffle, 0xe518, s_ss) \ V(F32x4FromInt32x4, 0xe519, s_s) \
V(F32x4FromInt32x4, 0xe519, s_s) \ V(F32x4FromUint32x4, 0xe51a, s_s) \
V(F32x4FromUint32x4, 0xe51a, s_s) \ V(I32x4Splat, 0xe51b, s_i) \
V(I32x4Splat, 0xe51b, s_i) \ V(I32x4ReplaceLane, 0xe51d, s_sii) \
V(I32x4ExtractLane, 0xe51c, i_si) \ V(I32x4Neg, 0xe51e, s_s) \
V(I32x4ReplaceLane, 0xe51d, s_sii) \ V(I32x4Add, 0xe51f, s_ss) \
V(I32x4Neg, 0xe51e, s_s) \ V(I32x4Sub, 0xe520, s_ss) \
V(I32x4Add, 0xe51f, s_ss) \ V(I32x4Mul, 0xe521, s_ss) \
V(I32x4Sub, 0xe520, s_ss) \ V(I32x4Min_s, 0xe522, s_ss) \
V(I32x4Mul, 0xe521, s_ss) \ V(I32x4Max_s, 0xe523, s_ss) \
V(I32x4Min_s, 0xe522, s_ss) \ V(I32x4Shl, 0xe524, s_si) \
V(I32x4Max_s, 0xe523, s_ss) \ V(I32x4Shr_s, 0xe525, s_si) \
V(I32x4Shl, 0xe524, s_si) \ V(I32x4Eq, 0xe526, s_ss) \
V(I32x4Shr_s, 0xe525, s_si) \ V(I32x4Ne, 0xe527, s_ss) \
V(I32x4Eq, 0xe526, s_ss) \ V(I32x4Lt_s, 0xe528, s_ss) \
V(I32x4Ne, 0xe527, s_ss) \ V(I32x4Le_s, 0xe529, s_ss) \
V(I32x4Lt_s, 0xe528, s_ss) \ V(I32x4Gt_s, 0xe52a, s_ss) \
V(I32x4Le_s, 0xe529, s_ss) \ V(I32x4Ge_s, 0xe52b, s_ss) \
V(I32x4Gt_s, 0xe52a, s_ss) \ V(I32x4Select, 0xe52c, s_sss) \
V(I32x4Ge_s, 0xe52b, s_ss) \ V(I32x4Swizzle, 0xe52d, s_s) \
V(I32x4Select, 0xe52c, s_sss) \ V(I32x4Shuffle, 0xe52e, s_ss) \
V(I32x4Swizzle, 0xe52d, s_s) \ V(I32x4FromFloat32x4, 0xe52f, s_s) \
V(I32x4Shuffle, 0xe52e, s_ss) \ V(I32x4Min_u, 0xe530, s_ss) \
V(I32x4FromFloat32x4, 0xe52f, s_s) \ V(I32x4Max_u, 0xe531, s_ss) \
V(I32x4Min_u, 0xe530, s_ss) \ V(I32x4Shr_u, 0xe532, s_ss) \
V(I32x4Max_u, 0xe531, s_ss) \ V(I32x4Lt_u, 0xe533, s_ss) \
V(I32x4Shr_u, 0xe532, s_ss) \ V(I32x4Le_u, 0xe534, s_ss) \
V(I32x4Lt_u, 0xe533, s_ss) \ V(I32x4Gt_u, 0xe535, s_ss) \
V(I32x4Le_u, 0xe534, s_ss) \ V(I32x4Ge_u, 0xe536, s_ss) \
V(I32x4Gt_u, 0xe535, s_ss) \ V(Ui32x4FromFloat32x4, 0xe537, s_s) \
V(I32x4Ge_u, 0xe536, s_ss) \ V(I16x8Splat, 0xe538, s_i) \
V(Ui32x4FromFloat32x4, 0xe537, s_s) \ V(I16x8ReplaceLane, 0xe53a, s_sii) \
V(I16x8Splat, 0xe538, s_i) \ V(I16x8Neg, 0xe53b, s_s) \
V(I16x8ExtractLane, 0xe539, i_si) \ V(I16x8Add, 0xe53c, s_ss) \
V(I16x8ReplaceLane, 0xe53a, s_sii) \ V(I16x8AddSaturate_s, 0xe53d, s_ss) \
V(I16x8Neg, 0xe53b, s_s) \ V(I16x8Sub, 0xe53e, s_ss) \
V(I16x8Add, 0xe53c, s_ss) \ V(I16x8SubSaturate_s, 0xe53f, s_ss) \
V(I16x8AddSaturate_s, 0xe53d, s_ss) \ V(I16x8Mul, 0xe540, s_ss) \
V(I16x8Sub, 0xe53e, s_ss) \ V(I16x8Min_s, 0xe541, s_ss) \
V(I16x8SubSaturate_s, 0xe53f, s_ss) \ V(I16x8Max_s, 0xe542, s_ss) \
V(I16x8Mul, 0xe540, s_ss) \ V(I16x8Shl, 0xe543, s_si) \
V(I16x8Min_s, 0xe541, s_ss) \ V(I16x8Shr_s, 0xe544, s_si) \
V(I16x8Max_s, 0xe542, s_ss) \ V(I16x8Eq, 0xe545, s_ss) \
V(I16x8Shl, 0xe543, s_si) \ V(I16x8Ne, 0xe546, s_ss) \
V(I16x8Shr_s, 0xe544, s_si) \ V(I16x8Lt_s, 0xe547, s_ss) \
V(I16x8Eq, 0xe545, s_ss) \ V(I16x8Le_s, 0xe548, s_ss) \
V(I16x8Ne, 0xe546, s_ss) \ V(I16x8Gt_s, 0xe549, s_ss) \
V(I16x8Lt_s, 0xe547, s_ss) \ V(I16x8Ge_s, 0xe54a, s_ss) \
V(I16x8Le_s, 0xe548, s_ss) \ V(I16x8Select, 0xe54b, s_sss) \
V(I16x8Gt_s, 0xe549, s_ss) \ V(I16x8Swizzle, 0xe54c, s_s) \
V(I16x8Ge_s, 0xe54a, s_ss) \ V(I16x8Shuffle, 0xe54d, s_ss) \
V(I16x8Select, 0xe54b, s_sss) \ V(I16x8AddSaturate_u, 0xe54e, s_ss) \
V(I16x8Swizzle, 0xe54c, s_s) \ V(I16x8SubSaturate_u, 0xe54f, s_ss) \
V(I16x8Shuffle, 0xe54d, s_ss) \ V(I16x8Min_u, 0xe550, s_ss) \
V(I16x8AddSaturate_u, 0xe54e, s_ss) \ V(I16x8Max_u, 0xe551, s_ss) \
V(I16x8SubSaturate_u, 0xe54f, s_ss) \ V(I16x8Shr_u, 0xe552, s_si) \
V(I16x8Min_u, 0xe550, s_ss) \ V(I16x8Lt_u, 0xe553, s_ss) \
V(I16x8Max_u, 0xe551, s_ss) \ V(I16x8Le_u, 0xe554, s_ss) \
V(I16x8Shr_u, 0xe552, s_si) \ V(I16x8Gt_u, 0xe555, s_ss) \
V(I16x8Lt_u, 0xe553, s_ss) \ V(I16x8Ge_u, 0xe556, s_ss) \
V(I16x8Le_u, 0xe554, s_ss) \ V(I8x16Splat, 0xe557, s_i) \
V(I16x8Gt_u, 0xe555, s_ss) \ V(I8x16ReplaceLane, 0xe559, s_sii) \
V(I16x8Ge_u, 0xe556, s_ss) \ V(I8x16Neg, 0xe55a, s_s) \
V(I8x16Splat, 0xe557, s_i) \ V(I8x16Add, 0xe55b, s_ss) \
V(I8x16ExtractLane, 0xe558, i_si) \ V(I8x16AddSaturate_s, 0xe55c, s_ss) \
V(I8x16ReplaceLane, 0xe559, s_sii) \ V(I8x16Sub, 0xe55d, s_ss) \
V(I8x16Neg, 0xe55a, s_s) \ V(I8x16SubSaturate_s, 0xe55e, s_ss) \
V(I8x16Add, 0xe55b, s_ss) \ V(I8x16Mul, 0xe55f, s_ss) \
V(I8x16AddSaturate_s, 0xe55c, s_ss) \ V(I8x16Min_s, 0xe560, s_ss) \
V(I8x16Sub, 0xe55d, s_ss) \ V(I8x16Max_s, 0xe561, s_ss) \
V(I8x16SubSaturate_s, 0xe55e, s_ss) \ V(I8x16Shl, 0xe562, s_si) \
V(I8x16Mul, 0xe55f, s_ss) \ V(I8x16Shr_s, 0xe563, s_si) \
V(I8x16Min_s, 0xe560, s_ss) \ V(I8x16Eq, 0xe564, s_ss) \
V(I8x16Max_s, 0xe561, s_ss) \ V(I8x16Neq, 0xe565, s_ss) \
V(I8x16Shl, 0xe562, s_si) \ V(I8x16Lt_s, 0xe566, s_ss) \
V(I8x16Shr_s, 0xe563, s_si) \ V(I8x16Le_s, 0xe567, s_ss) \
V(I8x16Eq, 0xe564, s_ss) \ V(I8x16Gt_s, 0xe568, s_ss) \
V(I8x16Neq, 0xe565, s_ss) \ V(I8x16Ge_s, 0xe569, s_ss) \
V(I8x16Lt_s, 0xe566, s_ss) \ V(I8x16Select, 0xe56a, s_sss) \
V(I8x16Le_s, 0xe567, s_ss) \ V(I8x16Swizzle, 0xe56b, s_s) \
V(I8x16Gt_s, 0xe568, s_ss) \ V(I8x16Shuffle, 0xe56c, s_ss) \
V(I8x16Ge_s, 0xe569, s_ss) \ V(I8x16AddSaturate_u, 0xe56d, s_ss) \
V(I8x16Select, 0xe56a, s_sss) \ V(I8x16Sub_saturate_u, 0xe56e, s_ss) \
V(I8x16Swizzle, 0xe56b, s_s) \ V(I8x16Min_u, 0xe56f, s_ss) \
V(I8x16Shuffle, 0xe56c, s_ss) \ V(I8x16Max_u, 0xe570, s_ss) \
V(I8x16AddSaturate_u, 0xe56d, s_ss) \ V(I8x16Shr_u, 0xe571, s_ss) \
V(I8x16Sub_saturate_u, 0xe56e, s_ss) \ V(I8x16Lt_u, 0xe572, s_ss) \
V(I8x16Min_u, 0xe56f, s_ss) \ V(I8x16Le_u, 0xe573, s_ss) \
V(I8x16Max_u, 0xe570, s_ss) \ V(I8x16Gt_u, 0xe574, s_ss) \
V(I8x16Shr_u, 0xe571, s_ss) \ V(I8x16Ge_u, 0xe575, s_ss) \
V(I8x16Lt_u, 0xe572, s_ss) \ V(S128And, 0xe576, s_ss) \
V(I8x16Le_u, 0xe573, s_ss) \ V(S128Ior, 0xe577, s_ss) \
V(I8x16Gt_u, 0xe574, s_ss) \ V(S128Xor, 0xe578, s_ss) \
V(I8x16Ge_u, 0xe575, s_ss) \
V(S128And, 0xe576, s_ss) \
V(S128Ior, 0xe577, s_ss) \
V(S128Xor, 0xe578, s_ss) \
V(S128Not, 0xe579, s_s) V(S128Not, 0xe579, s_s)
#define FOREACH_SIMD_1_OPERAND_OPCODE(V) \
V(F32x4ExtractLane, 0xe501, _) \
V(I32x4ExtractLane, 0xe51c, _) \
V(I16x8ExtractLane, 0xe539, _) \
V(I8x16ExtractLane, 0xe558, _)
// All opcodes. // All opcodes.
#define FOREACH_OPCODE(V) \ #define FOREACH_OPCODE(V) \
FOREACH_CONTROL_OPCODE(V) \ FOREACH_CONTROL_OPCODE(V) \
FOREACH_MISC_OPCODE(V) \ FOREACH_MISC_OPCODE(V) \
FOREACH_SIMPLE_OPCODE(V) \ FOREACH_SIMPLE_OPCODE(V) \
FOREACH_SIMPLE_MEM_OPCODE(V) \ FOREACH_SIMPLE_MEM_OPCODE(V) \
FOREACH_STORE_MEM_OPCODE(V) \ FOREACH_STORE_MEM_OPCODE(V) \
FOREACH_LOAD_MEM_OPCODE(V) \ FOREACH_LOAD_MEM_OPCODE(V) \
FOREACH_MISC_MEM_OPCODE(V) \ FOREACH_MISC_MEM_OPCODE(V) \
FOREACH_ASMJS_COMPAT_OPCODE(V) \ FOREACH_ASMJS_COMPAT_OPCODE(V) \
FOREACH_SIMD_OPCODE(V) FOREACH_SIMD_0_OPERAND_OPCODE(V) \
FOREACH_SIMD_1_OPERAND_OPCODE(V)
// All signatures. // All signatures.
#define FOREACH_SIGNATURE(V) \ #define FOREACH_SIGNATURE(V) \
...@@ -443,12 +446,10 @@ const WasmCodePosition kNoCodePosition = -1; ...@@ -443,12 +446,10 @@ const WasmCodePosition kNoCodePosition = -1;
#define FOREACH_SIMD_SIGNATURE(V) \ #define FOREACH_SIMD_SIGNATURE(V) \
V(s_s, kAstS128, kAstS128) \ V(s_s, kAstS128, kAstS128) \
V(s_f, kAstS128, kAstF32) \ V(s_f, kAstS128, kAstF32) \
V(f_si, kAstF32, kAstS128, kAstI32) \
V(s_sif, kAstS128, kAstS128, kAstI32, kAstF32) \ V(s_sif, kAstS128, kAstS128, kAstI32, kAstF32) \
V(s_ss, kAstS128, kAstS128, kAstS128) \ V(s_ss, kAstS128, kAstS128, kAstS128) \
V(s_sss, kAstS128, kAstS128, kAstS128, kAstS128) \ V(s_sss, kAstS128, kAstS128, kAstS128, kAstS128) \
V(s_i, kAstS128, kAstI32) \ V(s_i, kAstS128, kAstI32) \
V(i_si, kAstI32, kAstS128, kAstI32) \
V(s_sii, kAstS128, kAstS128, kAstI32, kAstI32) \ V(s_sii, kAstS128, kAstS128, kAstI32, kAstI32) \
V(s_si, kAstS128, kAstS128, kAstI32) V(s_si, kAstS128, kAstS128, kAstI32)
......
test/cctest/wasm/test-run-wasm-simd.cc
View file @ 7b3875d1
...@@ -29,24 +29,21 @@ WASM_EXEC_TEST(Splat) { ...@@ -29,24 +29,21 @@ WASM_EXEC_TEST(Splat) {
WasmRunner<int32_t> r(kExecuteCompiled, MachineType::Int32()); WasmRunner<int32_t> r(kExecuteCompiled, MachineType::Int32());
r.AllocateLocal(kAstS128); r.AllocateLocal(kAstS128);
BUILD(r, BUILD(r,
WASM_BLOCK(WASM_SET_LOCAL(1, WASM_SIMD_I32x4_SPLAT(WASM_GET_LOCAL(0))), WASM_BLOCK(
WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), WASM_SET_LOCAL(1, WASM_SIMD_I32x4_SPLAT(WASM_GET_LOCAL(0))),
WASM_SIMD_I32x4_EXTRACT_LANE( WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), WASM_SIMD_I32x4_EXTRACT_LANE(
WASM_GET_LOCAL(1), WASM_I8(0))), 0, WASM_GET_LOCAL(1))),
WASM_RETURN1(WASM_ZERO)), WASM_RETURN1(WASM_ZERO)),
WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), WASM_SIMD_I32x4_EXTRACT_LANE(
WASM_SIMD_I32x4_EXTRACT_LANE( 1, WASM_GET_LOCAL(1))),
WASM_GET_LOCAL(1), WASM_I8(1))), WASM_RETURN1(WASM_ZERO)),
WASM_RETURN1(WASM_ZERO)), WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), WASM_SIMD_I32x4_EXTRACT_LANE(
WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), 2, WASM_GET_LOCAL(1))),
WASM_SIMD_I32x4_EXTRACT_LANE( WASM_RETURN1(WASM_ZERO)),
WASM_GET_LOCAL(1), WASM_I8(2))), WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), WASM_SIMD_I32x4_EXTRACT_LANE(
WASM_RETURN1(WASM_ZERO)), 3, WASM_GET_LOCAL(1))),
WASM_IF(WASM_I32_NE(WASM_GET_LOCAL(0), WASM_RETURN1(WASM_ZERO)),
WASM_SIMD_I32x4_EXTRACT_LANE( WASM_RETURN1(WASM_ONE)));
WASM_GET_LOCAL(1), WASM_I8(3))),
WASM_RETURN1(WASM_ZERO)),
WASM_RETURN1(WASM_ONE)));
FOR_INT32_INPUTS(i) { CHECK_EQ(1, r.Call(*i)); } FOR_INT32_INPUTS(i) { CHECK_EQ(1, r.Call(*i)); }
} }
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