Fix SHL when shift amount is zero for arm and mips.

BUG=v8:2817
R=titzer@chromium.org
TEST=octane

Review URL: https://chromiumcodereview.appspot.com/21358002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15987 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/arm/lithium-codegen-arm.cc

@@ -1746,8 +1746,10 @@ void LCodeGen::DoShiftI(LShiftI* instr) {
               instr->can_deopt()) {
             if (shift_count != 1) {
               __ mov(result, Operand(left, LSL, shift_count - 1));
+              __ SmiTag(result, result, SetCC);
+            } else {
+              __ SmiTag(result, left, SetCC);
             }
-            __ SmiTag(result, result, SetCC);
             DeoptimizeIf(vs, instr->environment());
           } else {
             __ mov(result, Operand(left, LSL, shift_count));

src/mips/lithium-codegen-mips.cc

@@ -1585,8 +1585,10 @@ void LCodeGen::DoShiftI(LShiftI* instr) {
               instr->can_deopt()) {
             if (shift_count != 1) {
               __ sll(result, left, shift_count - 1);
+              __ SmiTagCheckOverflow(result, result, scratch);
+            } else {
+              __ SmiTagCheckOverflow(result, left, scratch);
             }
-            __ SmiTagCheckOverflow(result, result, scratch);
             DeoptimizeIf(lt, instr->environment(), scratch, Operand(zero_reg));
           } else {
             __ sll(result, left, shift_count);