[WASM] Implement remaining F32x4 operations for ARM.

- Implements Float32x4 Mul, Min, Max for ARM.
- Implements Float32x4 relational ops for ARM.
- Implements reciprocal, reciprocal square root estimate/refinement ops for ARM.
- Reorganizes tests to eliminate need for specialized float ref fns in tests.
- Rephrases Gt, Ge in terms of Lt, Le, and eliminates the redundant machine
  operators.
- Renames test-run-wasm-simd test names to match instructions.

LOG=N
BUG=v8:6020

Review-Url: https://codereview.chromium.org/2729943002
Cr-Commit-Position: refs/heads/master@{#43658}

src/compiler/arm/code-generator-arm.cc

@@ -1549,6 +1549,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vneg(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
+    case kArmFloat32x4RecipApprox: {
+      __ vrecpe(i.OutputSimd128Register(), i.InputSimd128Register(0));
+      break;
+    }
+    case kArmFloat32x4RecipSqrtApprox: {
+      __ vrsqrte(i.OutputSimd128Register(), i.InputSimd128Register(0));
+      break;
+    }
     case kArmFloat32x4Add: {
       __ vadd(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
@@ -1559,6 +1567,31 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputSimd128Register(1));
       break;
     }
+    case kArmFloat32x4Mul: {
+      __ vmul(i.OutputSimd128Register(), i.InputSimd128Register(0),
+              i.InputSimd128Register(1));
+      break;
+    }
+    case kArmFloat32x4Min: {
+      __ vmin(i.OutputSimd128Register(), i.InputSimd128Register(0),
+              i.InputSimd128Register(1));
+      break;
+    }
+    case kArmFloat32x4Max: {
+      __ vmax(i.OutputSimd128Register(), i.InputSimd128Register(0),
+              i.InputSimd128Register(1));
+      break;
+    }
+    case kArmFloat32x4RecipRefine: {
+      __ vrecps(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                i.InputSimd128Register(1));
+      break;
+    }
+    case kArmFloat32x4RecipSqrtRefine: {
+      __ vrsqrts(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                 i.InputSimd128Register(1));
+      break;
+    }
     case kArmFloat32x4Equal: {
       __ vceq(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
@@ -1570,6 +1603,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vmvn(dst, dst);
       break;
     }
+    case kArmFloat32x4LessThan: {
+      __ vcgt(i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
+      break;
+    }
+    case kArmFloat32x4LessThanOrEqual: {
+      __ vcge(i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
+      break;
+    }
     case kArmInt32x4Splat: {
       __ vdup(Neon32, i.OutputSimd128Register(), i.InputRegister(0));
       break;
@@ -1643,14 +1686,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vmvn(dst, dst);
       break;
     }
-    case kArmInt32x4GreaterThan: {
-      __ vcgt(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmInt32x4LessThan: {
+      __ vcgt(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
-    case kArmInt32x4GreaterThanOrEqual: {
-      __ vcge(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmInt32x4LessThanOrEqual: {
+      __ vcge(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
     case kArmUint32x4ShiftRightByScalar: {
@@ -1668,14 +1711,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputSimd128Register(1));
       break;
     }
-    case kArmUint32x4GreaterThan: {
-      __ vcgt(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmUint32x4LessThan: {
+      __ vcgt(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
-    case kArmUint32x4GreaterThanOrEqual: {
-      __ vcge(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmUint32x4LessThanOrEqual: {
+      __ vcge(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
     case kArmInt16x8Splat: {
@@ -1753,14 +1796,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vmvn(dst, dst);
       break;
     }
-    case kArmInt16x8GreaterThan: {
-      __ vcgt(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmInt16x8LessThan: {
+      __ vcgt(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
-    case kArmInt16x8GreaterThanOrEqual: {
-      __ vcge(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmInt16x8LessThanOrEqual: {
+      __ vcge(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
     case kArmUint16x8ShiftRightByScalar: {
@@ -1788,14 +1831,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputSimd128Register(1));
       break;
     }
-    case kArmUint16x8GreaterThan: {
-      __ vcgt(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmUint16x8LessThan: {
+      __ vcgt(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
-    case kArmUint16x8GreaterThanOrEqual: {
-      __ vcge(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmUint16x8LessThanOrEqual: {
+      __ vcge(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
     case kArmInt8x16Splat: {
@@ -1872,14 +1915,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vmvn(dst, dst);
       break;
     }
-    case kArmInt8x16GreaterThan: {
-      __ vcgt(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmInt8x16LessThan: {
+      __ vcgt(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
-    case kArmInt8x16GreaterThanOrEqual: {
-      __ vcge(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmInt8x16LessThanOrEqual: {
+      __ vcge(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
     case kArmUint8x16ShiftRightByScalar: {
@@ -1907,14 +1950,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputSimd128Register(1));
       break;
     }
-    case kArmUint8x16GreaterThan: {
-      __ vcgt(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmUint8x16LessThan: {
+      __ vcgt(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
-    case kArmUint8x16GreaterThanOrEqual: {
-      __ vcge(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
-              i.InputSimd128Register(1));
+    case kArmUint8x16LessThanOrEqual: {
+      __ vcge(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(1),
+              i.InputSimd128Register(0));
       break;
     }
     case kArmSimd128Zero: {

src/compiler/arm/instruction-codes-arm.h

@@ -127,10 +127,19 @@ namespace compiler {
   V(ArmFloat32x4FromUint32x4)      \
   V(ArmFloat32x4Abs)               \
   V(ArmFloat32x4Neg)               \
+  V(ArmFloat32x4RecipApprox)       \
+  V(ArmFloat32x4RecipSqrtApprox)   \
   V(ArmFloat32x4Add)               \
   V(ArmFloat32x4Sub)               \
+  V(ArmFloat32x4Mul)               \
+  V(ArmFloat32x4Min)               \
+  V(ArmFloat32x4Max)               \
+  V(ArmFloat32x4RecipRefine)       \
+  V(ArmFloat32x4RecipSqrtRefine)   \
   V(ArmFloat32x4Equal)             \
   V(ArmFloat32x4NotEqual)          \
+  V(ArmFloat32x4LessThan)          \
+  V(ArmFloat32x4LessThanOrEqual)   \
   V(ArmInt32x4Splat)               \
   V(ArmInt32x4ExtractLane)         \
   V(ArmInt32x4ReplaceLane)         \
@@ -146,13 +155,13 @@ namespace compiler {
   V(ArmInt32x4Max)                 \
   V(ArmInt32x4Equal)               \
   V(ArmInt32x4NotEqual)            \
-  V(ArmInt32x4GreaterThan)         \
-  V(ArmInt32x4GreaterThanOrEqual)  \
+  V(ArmInt32x4LessThan)            \
+  V(ArmInt32x4LessThanOrEqual)     \
   V(ArmUint32x4ShiftRightByScalar) \
   V(ArmUint32x4Min)                \
   V(ArmUint32x4Max)                \
-  V(ArmUint32x4GreaterThan)        \
-  V(ArmUint32x4GreaterThanOrEqual) \
+  V(ArmUint32x4LessThan)           \
+  V(ArmUint32x4LessThanOrEqual)    \
   V(ArmInt16x8Splat)               \
   V(ArmInt16x8ExtractLane)         \
   V(ArmInt16x8ReplaceLane)         \
@@ -168,15 +177,15 @@ namespace compiler {
   V(ArmInt16x8Max)                 \
   V(ArmInt16x8Equal)               \
   V(ArmInt16x8NotEqual)            \
-  V(ArmInt16x8GreaterThan)         \
-  V(ArmInt16x8GreaterThanOrEqual)  \
+  V(ArmInt16x8LessThan)            \
+  V(ArmInt16x8LessThanOrEqual)     \
   V(ArmUint16x8ShiftRightByScalar) \
   V(ArmUint16x8AddSaturate)        \
   V(ArmUint16x8SubSaturate)        \
   V(ArmUint16x8Min)                \
   V(ArmUint16x8Max)                \
-  V(ArmUint16x8GreaterThan)        \
-  V(ArmUint16x8GreaterThanOrEqual) \
+  V(ArmUint16x8LessThan)           \
+  V(ArmUint16x8LessThanOrEqual)    \
   V(ArmInt8x16Splat)               \
   V(ArmInt8x16ExtractLane)         \
   V(ArmInt8x16ReplaceLane)         \
@@ -192,15 +201,15 @@ namespace compiler {
   V(ArmInt8x16Max)                 \
   V(ArmInt8x16Equal)               \
   V(ArmInt8x16NotEqual)            \
-  V(ArmInt8x16GreaterThan)         \
-  V(ArmInt8x16GreaterThanOrEqual)  \
+  V(ArmInt8x16LessThan)            \
+  V(ArmInt8x16LessThanOrEqual)     \
   V(ArmUint8x16ShiftRightByScalar) \
   V(ArmUint8x16AddSaturate)        \
   V(ArmUint8x16SubSaturate)        \
   V(ArmUint8x16Min)                \
   V(ArmUint8x16Max)                \
-  V(ArmUint8x16GreaterThan)        \
-  V(ArmUint8x16GreaterThanOrEqual) \
+  V(ArmUint8x16LessThan)           \
+  V(ArmUint8x16LessThanOrEqual)    \
   V(ArmSimd128Zero)                \
   V(ArmSimd128And)                 \
   V(ArmSimd128Or)                  \

src/compiler/arm/instruction-scheduler-arm.cc

@@ -115,10 +115,19 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmFloat32x4FromUint32x4:
     case kArmFloat32x4Abs:
     case kArmFloat32x4Neg:
+    case kArmFloat32x4RecipApprox:
+    case kArmFloat32x4RecipSqrtApprox:
     case kArmFloat32x4Add:
     case kArmFloat32x4Sub:
+    case kArmFloat32x4Mul:
+    case kArmFloat32x4Min:
+    case kArmFloat32x4Max:
+    case kArmFloat32x4RecipRefine:
+    case kArmFloat32x4RecipSqrtRefine:
     case kArmFloat32x4Equal:
     case kArmFloat32x4NotEqual:
+    case kArmFloat32x4LessThan:
+    case kArmFloat32x4LessThanOrEqual:
     case kArmInt32x4Splat:
     case kArmInt32x4ExtractLane:
     case kArmInt32x4ReplaceLane:
@@ -134,13 +143,13 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmInt32x4Max:
     case kArmInt32x4Equal:
     case kArmInt32x4NotEqual:
-    case kArmInt32x4GreaterThan:
-    case kArmInt32x4GreaterThanOrEqual:
+    case kArmInt32x4LessThan:
+    case kArmInt32x4LessThanOrEqual:
     case kArmUint32x4ShiftRightByScalar:
     case kArmUint32x4Min:
     case kArmUint32x4Max:
-    case kArmUint32x4GreaterThan:
-    case kArmUint32x4GreaterThanOrEqual:
+    case kArmUint32x4LessThan:
+    case kArmUint32x4LessThanOrEqual:
     case kArmInt16x8Splat:
     case kArmInt16x8ExtractLane:
     case kArmInt16x8ReplaceLane:
@@ -156,15 +165,15 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmInt16x8Max:
     case kArmInt16x8Equal:
     case kArmInt16x8NotEqual:
-    case kArmInt16x8GreaterThan:
-    case kArmInt16x8GreaterThanOrEqual:
+    case kArmInt16x8LessThan:
+    case kArmInt16x8LessThanOrEqual:
     case kArmUint16x8ShiftRightByScalar:
     case kArmUint16x8AddSaturate:
     case kArmUint16x8SubSaturate:
     case kArmUint16x8Min:
     case kArmUint16x8Max:
-    case kArmUint16x8GreaterThan:
-    case kArmUint16x8GreaterThanOrEqual:
+    case kArmUint16x8LessThan:
+    case kArmUint16x8LessThanOrEqual:
     case kArmInt8x16Splat:
     case kArmInt8x16ExtractLane:
     case kArmInt8x16ReplaceLane:
@@ -180,15 +189,15 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmInt8x16Max:
     case kArmInt8x16Equal:
     case kArmInt8x16NotEqual:
-    case kArmInt8x16GreaterThan:
-    case kArmInt8x16GreaterThanOrEqual:
+    case kArmInt8x16LessThan:
+    case kArmInt8x16LessThanOrEqual:
     case kArmUint8x16ShiftRightByScalar:
     case kArmUint8x16AddSaturate:
     case kArmUint8x16SubSaturate:
     case kArmUint8x16Min:
     case kArmUint8x16Max:
-    case kArmUint8x16GreaterThan:
-    case kArmUint8x16GreaterThanOrEqual:
+    case kArmUint8x16LessThan:
+    case kArmUint8x16LessThanOrEqual:
     case kArmSimd128Zero:
     case kArmSimd128And:
     case kArmSimd128Or:

src/compiler/machine-operator.cc

@@ -239,12 +239,12 @@ MachineType AtomicExchangeRepresentationOf(Operator const* op) {
   V(Float32x4Max, Operator::kCommutative, 2, 0, 1)                         \
   V(Float32x4MinNum, Operator::kCommutative, 2, 0, 1)                      \
   V(Float32x4MaxNum, Operator::kCommutative, 2, 0, 1)                      \
+  V(Float32x4RecipRefine, Operator::kNoProperties, 2, 0, 1)                \
+  V(Float32x4RecipSqrtRefine, Operator::kNoProperties, 2, 0, 1)            \
   V(Float32x4Equal, Operator::kCommutative, 2, 0, 1)                       \
   V(Float32x4NotEqual, Operator::kCommutative, 2, 0, 1)                    \
   V(Float32x4LessThan, Operator::kNoProperties, 2, 0, 1)                   \
   V(Float32x4LessThanOrEqual, Operator::kNoProperties, 2, 0, 1)            \
-  V(Float32x4GreaterThan, Operator::kNoProperties, 2, 0, 1)                \
-  V(Float32x4GreaterThanOrEqual, Operator::kNoProperties, 2, 0, 1)         \
   V(Float32x4FromInt32x4, Operator::kNoProperties, 1, 0, 1)                \
   V(Float32x4FromUint32x4, Operator::kNoProperties, 1, 0, 1)               \
   V(Int32x4Splat, Operator::kNoProperties, 1, 0, 1)                        \
@@ -258,15 +258,11 @@ MachineType AtomicExchangeRepresentationOf(Operator const* op) {
   V(Int32x4NotEqual, Operator::kCommutative, 2, 0, 1)                      \
   V(Int32x4LessThan, Operator::kNoProperties, 2, 0, 1)                     \
   V(Int32x4LessThanOrEqual, Operator::kNoProperties, 2, 0, 1)              \
-  V(Int32x4GreaterThan, Operator::kNoProperties, 2, 0, 1)                  \
-  V(Int32x4GreaterThanOrEqual, Operator::kNoProperties, 2, 0, 1)           \
   V(Int32x4FromFloat32x4, Operator::kNoProperties, 1, 0, 1)                \
   V(Uint32x4Min, Operator::kCommutative, 2, 0, 1)                          \
   V(Uint32x4Max, Operator::kCommutative, 2, 0, 1)                          \
   V(Uint32x4LessThan, Operator::kNoProperties, 2, 0, 1)                    \
   V(Uint32x4LessThanOrEqual, Operator::kNoProperties, 2, 0, 1)             \
-  V(Uint32x4GreaterThan, Operator::kNoProperties, 2, 0, 1)                 \
-  V(Uint32x4GreaterThanOrEqual, Operator::kNoProperties, 2, 0, 1)          \
   V(Uint32x4FromFloat32x4, Operator::kNoProperties, 1, 0, 1)               \
   V(Int16x8Splat, Operator::kNoProperties, 1, 0, 1)                        \
   V(Int16x8Neg, Operator::kNoProperties, 1, 0, 1)                          \
@@ -281,16 +277,12 @@ MachineType AtomicExchangeRepresentationOf(Operator const* op) {
   V(Int16x8NotEqual, Operator::kCommutative, 2, 0, 1)                      \
   V(Int16x8LessThan, Operator::kNoProperties, 2, 0, 1)                     \
   V(Int16x8LessThanOrEqual, Operator::kNoProperties, 2, 0, 1)              \
-  V(Int16x8GreaterThan, Operator::kNoProperties, 2, 0, 1)                  \
-  V(Int16x8GreaterThanOrEqual, Operator::kNoProperties, 2, 0, 1)           \
   V(Uint16x8AddSaturate, Operator::kCommutative, 2, 0, 1)                  \
   V(Uint16x8SubSaturate, Operator::kNoProperties, 2, 0, 1)                 \
   V(Uint16x8Min, Operator::kCommutative, 2, 0, 1)                          \
   V(Uint16x8Max, Operator::kCommutative, 2, 0, 1)                          \
   V(Uint16x8LessThan, Operator::kNoProperties, 2, 0, 1)                    \
   V(Uint16x8LessThanOrEqual, Operator::kNoProperties, 2, 0, 1)             \
-  V(Uint16x8GreaterThan, Operator::kNoProperties, 2, 0, 1)                 \
-  V(Uint16x8GreaterThanOrEqual, Operator::kNoProperties, 2, 0, 1)          \
   V(Int8x16Splat, Operator::kNoProperties, 1, 0, 1)                        \
   V(Int8x16Neg, Operator::kNoProperties, 1, 0, 1)                          \
   V(Int8x16Add, Operator::kCommutative, 2, 0, 1)                           \
@@ -304,16 +296,12 @@ MachineType AtomicExchangeRepresentationOf(Operator const* op) {
   V(Int8x16NotEqual, Operator::kCommutative, 2, 0, 1)                      \
   V(Int8x16LessThan, Operator::kNoProperties, 2, 0, 1)                     \
   V(Int8x16LessThanOrEqual, Operator::kNoProperties, 2, 0, 1)              \
-  V(Int8x16GreaterThan, Operator::kNoProperties, 2, 0, 1)                  \
-  V(Int8x16GreaterThanOrEqual, Operator::kNoProperties, 2, 0, 1)           \
   V(Uint8x16AddSaturate, Operator::kCommutative, 2, 0, 1)                  \
   V(Uint8x16SubSaturate, Operator::kNoProperties, 2, 0, 1)                 \
   V(Uint8x16Min, Operator::kCommutative, 2, 0, 1)                          \
   V(Uint8x16Max, Operator::kCommutative, 2, 0, 1)                          \
   V(Uint8x16LessThan, Operator::kNoProperties, 2, 0, 1)                    \
   V(Uint8x16LessThanOrEqual, Operator::kNoProperties, 2, 0, 1)             \
-  V(Uint8x16GreaterThan, Operator::kNoProperties, 2, 0, 1)                 \
-  V(Uint8x16GreaterThanOrEqual, Operator::kNoProperties, 2, 0, 1)          \
   V(Simd128Load, Operator::kNoProperties, 2, 0, 1)                         \
   V(Simd128Load1, Operator::kNoProperties, 2, 0, 1)                        \
   V(Simd128Load2, Operator::kNoProperties, 2, 0, 1)                        \

src/compiler/machine-operator.h

@@ -443,12 +443,12 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
   const Operator* Float32x4Max();
   const Operator* Float32x4MinNum();
   const Operator* Float32x4MaxNum();
+  const Operator* Float32x4RecipRefine();
+  const Operator* Float32x4RecipSqrtRefine();
   const Operator* Float32x4Equal();
   const Operator* Float32x4NotEqual();
   const Operator* Float32x4LessThan();
   const Operator* Float32x4LessThanOrEqual();
-  const Operator* Float32x4GreaterThan();
-  const Operator* Float32x4GreaterThanOrEqual();
   const Operator* Float32x4FromInt32x4();
   const Operator* Float32x4FromUint32x4();
 
@@ -467,8 +467,6 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
   const Operator* Int32x4NotEqual();
   const Operator* Int32x4LessThan();
   const Operator* Int32x4LessThanOrEqual();
-  const Operator* Int32x4GreaterThan();
-  const Operator* Int32x4GreaterThanOrEqual();
   const Operator* Int32x4FromFloat32x4();
 
   const Operator* Uint32x4Min();
@@ -476,8 +474,6 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
   const Operator* Uint32x4ShiftRightByScalar(int32_t);
   const Operator* Uint32x4LessThan();
   const Operator* Uint32x4LessThanOrEqual();
-  const Operator* Uint32x4GreaterThan();
-  const Operator* Uint32x4GreaterThanOrEqual();
   const Operator* Uint32x4FromFloat32x4();
 
   const Operator* Int16x8Splat();
@@ -497,8 +493,6 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
   const Operator* Int16x8NotEqual();
   const Operator* Int16x8LessThan();
   const Operator* Int16x8LessThanOrEqual();
-  const Operator* Int16x8GreaterThan();
-  const Operator* Int16x8GreaterThanOrEqual();
 
   const Operator* Uint16x8AddSaturate();
   const Operator* Uint16x8SubSaturate();
@@ -507,8 +501,6 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
   const Operator* Uint16x8ShiftRightByScalar(int32_t);
   const Operator* Uint16x8LessThan();
   const Operator* Uint16x8LessThanOrEqual();
-  const Operator* Uint16x8GreaterThan();
-  const Operator* Uint16x8GreaterThanOrEqual();
 
   const Operator* Int8x16Splat();
   const Operator* Int8x16ExtractLane(int32_t);
@@ -527,8 +519,6 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
   const Operator* Int8x16NotEqual();
   const Operator* Int8x16LessThan();
   const Operator* Int8x16LessThanOrEqual();
-  const Operator* Int8x16GreaterThan();
-  const Operator* Int8x16GreaterThanOrEqual();
 
   const Operator* Uint8x16AddSaturate();
   const Operator* Uint8x16SubSaturate();
@@ -537,8 +527,6 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
   const Operator* Uint8x16ShiftRightByScalar(int32_t);
   const Operator* Uint8x16LessThan();
   const Operator* Uint8x16LessThanOrEqual();
-  const Operator* Uint8x16GreaterThan();
-  const Operator* Uint8x16GreaterThanOrEqual();
 
   const Operator* Simd128Load();
   const Operator* Simd128Load1();

src/compiler/opcodes.h

@@ -571,6 +571,8 @@
   V(Float32x4Max)                \
   V(Float32x4MinNum)             \
   V(Float32x4MaxNum)             \
+  V(Float32x4RecipRefine)        \
+  V(Float32x4RecipSqrtRefine)    \
   V(Float32x4Equal)              \
   V(Float32x4NotEqual)           \
   V(Float32x4LessThan)           \

src/wasm/wasm-opcodes.cc

@@ -178,7 +178,9 @@ const char* WasmOpcodes::OpcodeName(WasmOpcode opcode) {
     CASE_F32x4_OP(Sqrt, "sqrt")
     CASE_F32x4_OP(Div, "div")
     CASE_F32x4_OP(RecipApprox, "recip_approx")
-    CASE_F32x4_OP(SqrtApprox, "sqrt_approx")
+    CASE_F32x4_OP(RecipRefine, "recip_refine")
+    CASE_F32x4_OP(RecipSqrtApprox, "recip_sqrt_approx")
+    CASE_F32x4_OP(RecipSqrtRefine, "recip_sqrt_refine")
     CASE_F32x4_OP(Min, "min")
     CASE_F32x4_OP(Max, "max")
     CASE_F32x4_OP(MinNum, "min_num")

src/wasm/wasm-opcodes.h

@@ -285,7 +285,7 @@ constexpr WasmCodePosition kNoCodePosition = -1;
   V(F32x4Neg, 0xe504, s_s)               \
   V(F32x4Sqrt, 0xe505, s_s)              \
   V(F32x4RecipApprox, 0xe506, s_s)       \
-  V(F32x4SqrtApprox, 0xe507, s_s)        \
+  V(F32x4RecipSqrtApprox, 0xe507, s_s)   \
   V(F32x4Add, 0xe508, s_ss)              \
   V(F32x4Sub, 0xe509, s_ss)              \
   V(F32x4Mul, 0xe50a, s_ss)              \
@@ -294,6 +294,8 @@ constexpr WasmCodePosition kNoCodePosition = -1;
   V(F32x4Max, 0xe50d, s_ss)              \
   V(F32x4MinNum, 0xe50e, s_ss)           \
   V(F32x4MaxNum, 0xe50f, s_ss)           \
+  V(F32x4RecipRefine, 0xe592, s_ss)      \
+  V(F32x4RecipSqrtRefine, 0xe593, s_ss)  \
   V(F32x4Eq, 0xe510, s1x4_ss)            \
   V(F32x4Ne, 0xe511, s1x4_ss)            \
   V(F32x4Lt, 0xe512, s1x4_ss)            \