Commit 776c95f3 authored by Liu Yu's avatar Liu Yu Committed by V8 LUCI CQ

[loong64][mips64][heap, baseline] Implement shared write barrier

Port commit 805df68f

Bug: v8:11708
Change-Id: I1a6970d18f1991e4158edb41ec5b8e393fccba4c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3855696
Auto-Submit: Liu Yu <liuyu@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: 's avatarZhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/main@{#82712}
parent 3e9f46e8
......@@ -298,8 +298,9 @@ void MacroAssembler::RecordWrite(Register object, Operand offset,
JumpIfSmi(value, &done);
}
CheckPageFlag(value, MemoryChunk::kPointersToHereAreInterestingMask, eq,
&done);
CheckPageFlag(value,
MemoryChunk::kPointersToHereAreInterestingOrInSharedHeapMask,
eq, &done);
CheckPageFlag(object, MemoryChunk::kPointersFromHereAreInterestingMask, eq,
&done);
......
......@@ -286,7 +286,8 @@ void MacroAssembler::RecordWrite(Register object, Register address,
CheckPageFlag(value,
value, // Used as scratch.
MemoryChunk::kPointersToHereAreInterestingMask, eq, &done);
MemoryChunk::kPointersToHereAreInterestingOrInSharedHeapMask,
eq, &done);
CheckPageFlag(object,
value, // Used as scratch.
MemoryChunk::kPointersFromHereAreInterestingMask, eq, &done);
......
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