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Commit 7766d194 authored by Clemens Backes's avatar Clemens Backes Committed by Commit Bot
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[Liftoff] Remove unneccessary bailout for missing SSE support 

In most cases where we bail out to TurboFan, we actually have a fallback
that just calls a C function instead. This fallback did not exist
initially, but was added later for other platforms (see e.g.
https://crrev.com/c/1044187).
By reusing that fallback on intel, we remove another portion of function
that could not be compiled in Liftoff on specific CPUs.

R=ahaas@chromium.org

Bug: v8:9919
Change-Id: I151000c004dc330362337bf7ddeaec68390c3467
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1921986Reviewed-by: 's avatarAndreas Haas <ahaas@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65029}
parent a34917bd
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Showing with 40 additions and 70 deletions
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
View file @ 7766d194
......@@ -14,11 +14,8 @@ namespace v8 {
namespace internal {
namespace wasm {
#define REQUIRE_CPU_FEATURE(name, ...) \
if (!CpuFeatures::IsSupported(name)) { \
bailout(kMissingCPUFeature, "no " #name); \
return __VA_ARGS__; \
} \
#define RETURN_FALSE_IF_MISSING_CPU_FEATURE(name) \
if (!CpuFeatures::IsSupported(name)) return false; \
CpuFeatureScope feature(this, name);
namespace liftoff {
......@@ -1300,40 +1297,28 @@ void LiftoffAssembler::emit_f32_neg(DoubleRegister dst, DoubleRegister src) {
}
bool LiftoffAssembler::emit_f32_ceil(DoubleRegister dst, DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundUp);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundss(dst, src, kRoundUp);
return true;
}
bool LiftoffAssembler::emit_f32_floor(DoubleRegister dst, DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundDown);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundss(dst, src, kRoundDown);
return true;
}
bool LiftoffAssembler::emit_f32_trunc(DoubleRegister dst, DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundToZero);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundss(dst, src, kRoundToZero);
return true;
}
bool LiftoffAssembler::emit_f32_nearest_int(DoubleRegister dst,
DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
roundss(dst, src, kRoundToNearest);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundss(dst, src, kRoundToNearest);
return true;
}
void LiftoffAssembler::emit_f32_sqrt(DoubleRegister dst, DoubleRegister src) {
......@@ -1449,26 +1434,26 @@ void LiftoffAssembler::emit_f64_neg(DoubleRegister dst, DoubleRegister src) {
}
bool LiftoffAssembler::emit_f64_ceil(DoubleRegister dst, DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundsd(dst, src, kRoundUp);
return true;
}
bool LiftoffAssembler::emit_f64_floor(DoubleRegister dst, DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundsd(dst, src, kRoundDown);
return true;
}
bool LiftoffAssembler::emit_f64_trunc(DoubleRegister dst, DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundsd(dst, src, kRoundToZero);
return true;
}
bool LiftoffAssembler::emit_f64_nearest_int(DoubleRegister dst,
DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
roundsd(dst, src, kRoundToNearest);
return true;
}
......@@ -1968,7 +1953,7 @@ void LiftoffStackSlots::Construct() {
}
}
#undef REQUIRE_CPU_FEATURE
#undef RETURN_FALSE_IF_MISSING_CPU_FEATURE
} // namespace wasm
} // namespace internal
......
src/wasm/baseline/x64/liftoff-assembler-x64.h
View file @ 7766d194
......@@ -14,11 +14,8 @@ namespace v8 {
namespace internal {
namespace wasm {
#define REQUIRE_CPU_FEATURE(name, ...) \
if (!CpuFeatures::IsSupported(name)) { \
bailout(kMissingCPUFeature, "no " #name); \
return __VA_ARGS__; \
} \
#define RETURN_FALSE_IF_MISSING_CPU_FEATURE(name) \
if (!CpuFeatures::IsSupported(name)) return false; \
CpuFeatureScope feature(this, name);
namespace liftoff {
......@@ -1085,40 +1082,28 @@ void LiftoffAssembler::emit_f32_neg(DoubleRegister dst, DoubleRegister src) {
}
bool LiftoffAssembler::emit_f32_ceil(DoubleRegister dst, DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
Roundss(dst, src, kRoundUp);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundss(dst, src, kRoundUp);
return true;
}
bool LiftoffAssembler::emit_f32_floor(DoubleRegister dst, DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
Roundss(dst, src, kRoundDown);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundss(dst, src, kRoundDown);
return true;
}
bool LiftoffAssembler::emit_f32_trunc(DoubleRegister dst, DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
Roundss(dst, src, kRoundToZero);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundss(dst, src, kRoundToZero);
return true;
}
bool LiftoffAssembler::emit_f32_nearest_int(DoubleRegister dst,
DoubleRegister src) {
if (CpuFeatures::IsSupported(SSE4_1)) {
CpuFeatureScope feature(this, SSE4_1);
Roundss(dst, src, kRoundToNearest);
return true;
}
return false;
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundss(dst, src, kRoundToNearest);
return true;
}
void LiftoffAssembler::emit_f32_sqrt(DoubleRegister dst, DoubleRegister src) {
......@@ -1230,26 +1215,26 @@ void LiftoffAssembler::emit_f64_neg(DoubleRegister dst, DoubleRegister src) {
}
bool LiftoffAssembler::emit_f64_ceil(DoubleRegister dst, DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundsd(dst, src, kRoundUp);
return true;
}
bool LiftoffAssembler::emit_f64_floor(DoubleRegister dst, DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundsd(dst, src, kRoundDown);
return true;
}
bool LiftoffAssembler::emit_f64_trunc(DoubleRegister dst, DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundsd(dst, src, kRoundToZero);
return true;
}
bool LiftoffAssembler::emit_f64_nearest_int(DoubleRegister dst,
DoubleRegister src) {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Roundsd(dst, src, kRoundToNearest);
return true;
}
......@@ -1358,7 +1343,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
return liftoff::EmitTruncateFloatToInt<int64_t, float>(this, dst.gp(),
src.fp(), trap);
case kExprI64UConvertF32: {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Cvttss2uiq(dst.gp(), src.fp(), trap);
return true;
}
......@@ -1366,7 +1351,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
return liftoff::EmitTruncateFloatToInt<int64_t, double>(this, dst.gp(),
src.fp(), trap);
case kExprI64UConvertF64: {
REQUIRE_CPU_FEATURE(SSE4_1, true);
RETURN_FALSE_IF_MISSING_CPU_FEATURE(SSE4_1);
Cvttsd2uiq(dst.gp(), src.fp(), trap);
return true;
}
......@@ -1698,7 +1683,7 @@ void LiftoffStackSlots::Construct() {
}
}
#undef REQUIRE_CPU_FEATURE
#undef RETURN_FALSE_IF_MISSING_CPU_FEATURE
} // namespace wasm
} // namespace internal
......
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