Revert "s390: cleanup TM family instructions"

This reverts commit e7cc0f81.

Reason for revert: <INSERT REASONING HERE>

Original change's description:
> s390: cleanup TM family instructions
> 
> Change-Id: I4a95a7508d66950db4a0032893ca0a34901b2d59
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1688559
> Reviewed-by: Joran Siu <joransiu@ca.ibm.com>
> Reviewed-by: Junliang Yan <jyan@ca.ibm.com>
> Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
> Cr-Commit-Position: refs/heads/master@{#62772}

TBR=jyan@ca.ibm.com,joransiu@ca.ibm.com,yang.qin@ibm.com

Change-Id: If7c26ba0b2f5ecc66a85841995a1ee21c3cba454
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1706362Reviewed-by: Milad Farazmand <miladfar@ca.ibm.com>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#62785}

src/execution/s390/simulator-s390.cc

@@ -5157,9 +5157,16 @@ EVALUATE(TM) {
   intptr_t addr = b1_val + d1_val;
   uint8_t mem_val = ReadB(addr);
   uint8_t selected_bits = mem_val & imm_val;
-  // is TM
-  bool is_tm_or_tmy = 1;
-  condition_reg_ = TestUnderMask(selected_bits, imm_val, is_tm_or_tmy);
+  // CC0: Selected bits are zero
+  // CC1: Selected bits mixed zeros and ones
+  // CC3: Selected bits all ones
+  if (0 == selected_bits) {
+    condition_reg_ = CC_EQ;  // CC0
+  } else if (selected_bits == imm_val) {
+    condition_reg_ = 0x1;  // CC3
+  } else {
+    condition_reg_ = 0x4;  // CC1
+  }
   return length;
 }
 
@@ -5588,8 +5595,7 @@ EVALUATE(LLILL) {
   return 0;
 }
 
-inline static int TestUnderMask(uint16_t val, uint16_t mask,
-                                bool is_tm_or_tmy) {
+inline static int TestUnderMask(uint16_t val, uint16_t mask) {
   // Test if all selected bits are zeros or mask is zero
   if (0 == (mask & val)) {
     return 0x8;
@@ -5601,13 +5607,6 @@ inline static int TestUnderMask(uint16_t val, uint16_t mask,
   }
 
   // Now we know selected bits mixed zeros and ones
-  // Test if it is TM or TMY since they have
-  // different CC result from TMLL/TMLH/TMHH/TMHL
-  if (is_tm_or_tmy) {
-    return 0x4;
-  }
-
-  // Now we know the instruction is TMLL/TMLH/TMHH/TMHL
   // Test if the leftmost bit is zero or one
 #if defined(__GNUC__)
   int leadingZeros = __builtin_clz(mask);
@@ -5640,8 +5639,7 @@ EVALUATE(TMLH) {
   DECODE_RI_A_INSTRUCTION(instr, r1, i2);
   uint32_t value = get_low_register<uint32_t>(r1) >> 16;
   uint32_t mask = i2 & 0x0000FFFF;
-  bool is_tm_or_tmy = 0;
-  condition_reg_ = TestUnderMask(value, mask, is_tm_or_tmy);
+  condition_reg_ = TestUnderMask(value, mask);
   return length;  // DONE
 }
 
@@ -5650,29 +5648,20 @@ EVALUATE(TMLL) {
   DECODE_RI_A_INSTRUCTION(instr, r1, i2);
   uint32_t value = get_low_register<uint32_t>(r1) & 0x0000FFFF;
   uint32_t mask = i2 & 0x0000FFFF;
-  bool is_tm_or_tmy = 0;
-  condition_reg_ = TestUnderMask(value, mask, is_tm_or_tmy);
+  condition_reg_ = TestUnderMask(value, mask);
   return length;  // DONE
 }
 
 EVALUATE(TMHH) {
-  DCHECK_OPCODE(TMHH);
-  DECODE_RI_A_INSTRUCTION(instr, r1, i2);
-  uint32_t value = get_high_register<uint32_t>(r1) >> 16;
-  uint32_t mask = i2 & 0x0000FFFF;
-  bool is_tm_or_tmy = 0;
-  condition_reg_ = TestUnderMask(value, mask, is_tm_or_tmy);
-  return length;
+  UNIMPLEMENTED();
+  USE(instr);
+  return 0;
 }
 
 EVALUATE(TMHL) {
-  DCHECK_OPCODE(TMHL);
-  DECODE_RI_A_INSTRUCTION(instr, r1, i2);
-  uint32_t value = get_high_register<uint32_t>(r1) & 0x0000FFFF;
-  uint32_t mask = i2 & 0x0000FFFF;
-  bool is_tm_or_tmy = 0;
-  condition_reg_ = TestUnderMask(value, mask, is_tm_or_tmy);
-  return length;
+  UNIMPLEMENTED();
+  USE(instr);
+  return 0;
 }
 
 EVALUATE(BRAS) {
@@ -9986,14 +9975,23 @@ EVALUATE(ECAG) {
 EVALUATE(TMY) {
   DCHECK_OPCODE(TMY);
   // Test Under Mask (Mem - Imm) (8)
-  DECODE_SIY_INSTRUCTION(b1, d1_val, imm_val);
+  DECODE_SIY_INSTRUCTION(b1, d1, i2);
   int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+  intptr_t d1_val = d1;
   intptr_t addr = b1_val + d1_val;
   uint8_t mem_val = ReadB(addr);
+  uint8_t imm_val = i2;
   uint8_t selected_bits = mem_val & imm_val;
-  // is TMY
-  bool is_tm_or_tmy = 1;
-  condition_reg_ = TestUnderMask(selected_bits, imm_val, is_tm_or_tmy);
+  // CC0: Selected bits are zero
+  // CC1: Selected bits mixed zeros and ones
+  // CC3: Selected bits all ones
+  if (0 == selected_bits) {
+    condition_reg_ = CC_EQ;  // CC0
+  } else if (selected_bits == imm_val) {
+    condition_reg_ = 0x1;  // CC3
+  } else {
+    condition_reg_ = 0x4;  // CC1
+  }
   return length;
 }
 

test/cctest/test-assembler-s390.cc

@@ -933,97 +933,6 @@ TEST(17) {
   ::printf("f() = %" V8PRIxPTR "\n", res);
   CHECK_EQ(0, static_cast<int>(res));
 }
-//TMHH, TMHL
-TEST(18) {
-  CcTest::InitializeVM();
-  Isolate* isolate = CcTest::i_isolate();
-  HandleScope scope(isolate);
-  Assembler assm(AssemblerOptions{});
-
-  Label done, error;
-  Label continue1, continue2, continue3, continue4;
-  Label continue5, continue6, continue7, continue8, continue9;
-
-  // selected bits all 0
-  __ lgfi(r1, Operand(0));
-  __ tmhh(r1, Operand(1));
-  __ beq(&continue1); //8
-  __ b(&error);
-
-  __ bind(&continue1);
-  __ tmhl(r1, Operand(1));
-  __ beq(&continue2); //8
-  __ b(&error);
-
-  // mask = 0
-  __ bind(&continue2);
-  __ lgfi(r1, Operand(-1));
-  __ tmhh(r1, Operand(0));
-  __ beq(&continue3);  //8
-  __ b(&error);
-
-  __ bind(&continue3);
-  __ tmhh(r1, Operand(0));
-  __ beq(&continue4);  //8
-  __ b(&error);
-
-  // selected bits all 1
-  __ bind(&continue4);
-  __ tmhh(r1, Operand(1));
-  __ b(Condition(1), &continue5); //1
-  __ b(&error);
-
-  __ bind(&continue5);
-  __ tmhl(r1, Operand(1));
-  __ b(Condition(1), &continue6); //1
-  __ b(&error);
-
-  // // leftmost = 1
-  __ bind(&continue6);
-  __ iihh(r1, Operand(0xF000));
-  __ iihl(r1, Operand(0xF000));
-  __ tmhh(r1, Operand(0xFFFF));
-  __ b(Condition(2), &continue7); //2
-  __ b(&error);
-
-  __ bind(&continue7);
-  __ tmhl(r1, Operand(0xFFFF));
-  __ b(Condition(2), &continue8); //2
-  __ b(&error);
-
-  // leftmost = 0
-  __ bind(&continue8);
-  __ iihh(r1, Operand(0x0FF0));
-  __ iihl(r1, Operand(0x0FF0));
-  __ tmhh(r1, Operand(0xFFFF));
-  __ b(Condition(4), &continue9); //4
-  __ b(&error);
-
-  __ bind(&continue9);
-  __ tmhl(r1, Operand(0xFFFF));
-  __ b(Condition(4), &done); //4
-  __ b(&error);
-
-  __ bind(&error);
-  __ lgfi(r2, Operand(1));
-  __ b(r14);
-
-  __ bind(&done);
-  __ lgfi(r2, Operand::Zero());
-  __ b(r14);
-
-  CodeDesc desc;
-  assm.GetCode(isolate, &desc);
-  Handle<Code> code = Factory::CodeBuilder(isolate, desc, Code::STUB).Build();
-#ifdef DEBUG
-  code->Print();
-#endif
-  auto f = GeneratedCode<F1>::FromCode(*code);
-  // f.Call(reg2, reg3, reg4, reg5, reg6) -> set the register value
-  intptr_t res = reinterpret_cast<intptr_t>(f.Call(0, 0, 0, 0, 0));
-  ::printf("f() = %" V8PRIxPTR "\n", res);
-  CHECK_EQ(0, static_cast<int>(res));
-}
 
 #undef __