[mips] Reland "[compiler] Optionally apply an offset to stack checks"

Port b875f466

Original Commit Message:

    Reland "[compiler] Optionally apply an offset to stack checks"

    This is a reland of 4a16305b

    The original CL adjust only one part of the stack check, namely the
    comparison of the stack pointer against the stack limit in generated code.
    There is a second part: Runtime::kStackGuard repeats this check to
    distinguish between a stack overflow and an interrupt request.

    This second part in runtime must apply the offset just like in generated
    code. It is implemented in this reland by the StackCheckOffset operator
    and a new StackGuardWithGap runtime function.

    Original change's description:
    > [compiler] Optionally apply an offset to stack checks
    >
    > The motivation behind this change is that the frame size of an optimized
    > function and its unoptimized version may differ, and deoptimization
    > may thus trigger a stack overflow. The solution implemented in this CL
    > is to optionally apply an offset to the stack check s.t. the check
    > becomes 'sp - offset > limit'. The offset is applied to stack checks at
    > function-entry, and is set to the difference between the optimized and
    > unoptimized frame size.
    >
    > A caveat: OSR may not be fully handled by this fix since we've already
    > passed the function-entry stack check. A possible solution would be to
    > *not* skip creation of function-entry stack checks for inlinees.
    >
    > This CL: 1. annotates stack check nodes with the stack check kind, where
    > kind is one of {function-entry,iteration-body,unknown}. 2. potentially
    > allocates a temporary register to store the result of the 'sp - offset'
    > in instruction selection (and switches input registers to 'unique'
    > mode). 3. Applies the offset in code generation.
    >
    > mode). 3. Applies the offset in code generation.
    >
    > Drive-by: Add src/compiler/globals.h for compiler-specific globals.
    >
    > Bug: v8:9534,chromium:1000887
    > Change-Id: I257191c4a4978ccb60cfa5805ef421f30f0e9826
    > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1762521
    > Commit-Queue: Jakob Gruber <jgruber@chromium.org>
    > Reviewed-by: Georg Neis <neis@chromium.org>
    > Cr-Commit-Position: refs/heads/master@{#63701}

Change-Id: I77554bddde57153ec92c4b80c15d0a52efbaab2d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1893554Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Commit-Queue: Mu Tao <pamilty@gmail.com>
Cr-Commit-Position: refs/heads/master@{#64718}

src/compiler/backend/mips/code-generator-mips.cc

@@ -883,6 +883,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
     case kArchStackPointerGreaterThan:
       // Pseudo-instruction used for cmp/branch. No opcode emitted here.
       break;
+    case kArchStackCheckOffset:
+      __ Move(i.OutputRegister(), Smi::FromInt(GetStackCheckOffset()));
+      break;
     case kArchFramePointer:
       __ mov(i.OutputRegister(), fp);
       break;
@@ -3127,7 +3130,13 @@ void AssembleBranchToLabels(CodeGenerator* gen, TurboAssembler* tasm,
     __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
   } else if (instr->arch_opcode() == kArchStackPointerGreaterThan) {
     cc = FlagsConditionToConditionCmp(condition);
-    __ Branch(tlabel, cc, sp, Operand(i.InputRegister(0)));
+    Register lhs_register = sp;
+    uint32_t offset;
+    if (gen->ShouldApplyOffsetToStackCheck(instr, &offset)) {
+      lhs_register = i.TempRegister(0);
+      __ Subu(lhs_register, sp, offset);
+    }
+    __ Branch(tlabel, cc, lhs_register, Operand(i.InputRegister(0)));
   } else if (instr->arch_opcode() == kMipsCmpS ||
              instr->arch_opcode() == kMipsCmpD) {
     bool predicate;

src/compiler/backend/mips/instruction-selector-mips.cc

@@ -1535,11 +1535,31 @@ void VisitWordCompare(InstructionSelector* selector, Node* node,
 
 void InstructionSelector::VisitStackPointerGreaterThan(
     Node* node, FlagsContinuation* cont) {
-  Node* const value = node->InputAt(0);
-  InstructionCode opcode = kArchStackPointerGreaterThan;
+  StackCheckKind kind = StackCheckKindOf(node->op());
+  InstructionCode opcode =
+      kArchStackPointerGreaterThan | MiscField::encode(static_cast<int>(kind));
 
   MipsOperandGenerator g(this);
-  EmitWithContinuation(opcode, g.UseRegister(value), cont);
+
+  // No outputs.
+  InstructionOperand* const outputs = nullptr;
+  const int output_count = 0;
+
+  // Applying an offset to this stack check requires a temp register. Offsets
+  // are only applied to the first stack check. If applying an offset, we must
+  // ensure the input and temp registers do not alias, thus kUniqueRegister.
+  InstructionOperand temps[] = {g.TempRegister()};
+  const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 1 : 0);
+  const auto register_mode = (kind == StackCheckKind::kJSFunctionEntry)
+                                 ? OperandGenerator::kUniqueRegister
+                                 : OperandGenerator::kRegister;
+
+  Node* const value = node->InputAt(0);
+  InstructionOperand inputs[] = {g.UseRegisterWithMode(value, register_mode)};
+  static constexpr int input_count = arraysize(inputs);
+
+  EmitWithContinuation(opcode, output_count, outputs, input_count, inputs,
+                       temp_count, temps, cont);
 }
 
 // Shared routine for word comparisons against zero.

src/compiler/backend/mips64/code-generator-mips64.cc

@@ -861,6 +861,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
     case kArchStackPointerGreaterThan:
       // Pseudo-instruction used for cmp/branch. No opcode emitted here.
       break;
+    case kArchStackCheckOffset:
+      __ Move(i.OutputRegister(), Smi::FromInt(GetStackCheckOffset()));
+      break;
     case kArchFramePointer:
       __ mov(i.OutputRegister(), fp);
       break;
@@ -3242,7 +3245,13 @@ void AssembleBranchToLabels(CodeGenerator* gen, TurboAssembler* tasm,
     __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
   } else if (instr->arch_opcode() == kArchStackPointerGreaterThan) {
     cc = FlagsConditionToConditionCmp(condition);
-    __ Branch(tlabel, cc, sp, Operand(i.InputRegister(0)));
+    Register lhs_register = sp;
+    uint32_t offset;
+    if (gen->ShouldApplyOffsetToStackCheck(instr, &offset)) {
+      lhs_register = i.TempRegister(0);
+      __ Dsubu(lhs_register, sp, offset);
+    }
+    __ Branch(tlabel, cc, lhs_register, Operand(i.InputRegister(0)));
   } else if (instr->arch_opcode() == kMips64CmpS ||
              instr->arch_opcode() == kMips64CmpD) {
     bool predicate;

src/compiler/backend/mips64/instruction-selector-mips64.cc

@@ -2096,11 +2096,31 @@ void VisitAtomicBinop(InstructionSelector* selector, Node* node,
 
 void InstructionSelector::VisitStackPointerGreaterThan(
     Node* node, FlagsContinuation* cont) {
-  Node* const value = node->InputAt(0);
-  InstructionCode opcode = kArchStackPointerGreaterThan;
+  StackCheckKind kind = StackCheckKindOf(node->op());
+  InstructionCode opcode =
+      kArchStackPointerGreaterThan | MiscField::encode(static_cast<int>(kind));
 
   Mips64OperandGenerator g(this);
-  EmitWithContinuation(opcode, g.UseRegister(value), cont);
+
+  // No outputs.
+  InstructionOperand* const outputs = nullptr;
+  const int output_count = 0;
+
+  // Applying an offset to this stack check requires a temp register. Offsets
+  // are only applied to the first stack check. If applying an offset, we must
+  // ensure the input and temp registers do not alias, thus kUniqueRegister.
+  InstructionOperand temps[] = {g.TempRegister()};
+  const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 1 : 0);
+  const auto register_mode = (kind == StackCheckKind::kJSFunctionEntry)
+                                 ? OperandGenerator::kUniqueRegister
+                                 : OperandGenerator::kRegister;
+
+  Node* const value = node->InputAt(0);
+  InstructionOperand inputs[] = {g.UseRegisterWithMode(value, register_mode)};
+  static constexpr int input_count = arraysize(inputs);
+
+  EmitWithContinuation(opcode, output_count, outputs, input_count, inputs,
+                       temp_count, temps, cont);
 }
 
 // Shared routine for word comparisons against zero.