A64 tweaks for division-like operations.

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/190603003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19720 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/a64/lithium-codegen-a64.cc

@@ -2630,8 +2630,7 @@ void LCodeGen::DoDivByConstI(LDivByConstI* instr) {
   HDiv* hdiv = instr->hydrogen();
   if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero) &&
       hdiv->left()->RangeCanInclude(0) && divisor < 0) {
-    __ Cmp(dividend, 0);
-    DeoptimizeIf(eq, instr->environment());
+    DeoptimizeIfZero(dividend, instr->environment());
   }
 
   __ FlooringDiv(result, dividend, Abs(divisor));

src/a64/macro-assembler-a64.cc

@@ -4936,18 +4936,15 @@ void MacroAssembler::FlooringDiv(Register result,
                                  Register dividend,
                                  int32_t divisor) {
   Register tmp = WTmp0();
-  ASSERT(!AreAliased(dividend, result, tmp));
+  ASSERT(!AreAliased(result, dividend, tmp));
+  ASSERT(result.Is32Bits() && dividend.Is32Bits());
   MultiplierAndShift ms(divisor);
   Mov(tmp, Operand(ms.multiplier()));
   Smull(result.X(), dividend, tmp);
-  Mov(result.X(), Operand(result.X(), ASR, 32));
-  if (divisor > 0 && ms.multiplier() < 0) {
-    Add(result, result, Operand(dividend));
-  }
-  if (divisor < 0 && ms.multiplier() > 0) {
-    Sub(result, result, Operand(dividend));
-  }
-  if (ms.shift() > 0) Mov(result, Operand(result, ASR, ms.shift()));
+  Asr(result.X(), result.X(), 32);
+  if (divisor > 0 && ms.multiplier() < 0) Add(result, result, dividend);
+  if (divisor < 0 && ms.multiplier() > 0) Sub(result, result, dividend);
+  if (ms.shift() > 0) Asr(result, result, ms.shift());
   Add(result, result, Operand(dividend, LSR, 31));
 }