Revert of [turbofan] remove control field from instruction (patchset #1 id:1...

Revert of [turbofan] remove control field from instruction (patchset #1 id:1 of https://codereview.chromium.org/810023002/)

Reason for revert:
Needed to revert https://chromium.googlesource.com/v8/v8/+/70b5eb47b39acbf31746f4a116a9b3ce2730218a

Original issue's description:
> [turbofan] remove control field from instruction
>
> R=titzer@chromium.org
> BUG=
>
> Committed: https://crrev.com/7b9cb2eb3764d0c807c669e397fc3b84fbefb175
> Cr-Commit-Position: refs/heads/master@{#25866}

TBR=titzer@chromium.org,dcarney@chromium.org
NOTREECHECKS=true
NOTRY=true
BUG=

Review URL: https://codereview.chromium.org/814043002

Cr-Commit-Position: refs/heads/master@{#25884}

src/compiler/arm/instruction-selector-arm.cc

@@ -238,8 +238,9 @@ void VisitBinop(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(outputs), output_count);
   DCHECK_NE(kMode_None, AddressingModeField::decode(opcode));
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -577,8 +578,9 @@ static inline void VisitShift(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(outputs), output_count);
   DCHECK_NE(kMode_None, AddressingModeField::decode(opcode));
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -1075,7 +1077,7 @@ void VisitFloat64Compare(InstructionSelector* selector, Node* node,
     selector->Emit(cont->Encode(kArmVcmpF64), nullptr,
                    g.UseRegister(m.left().node()),
                    g.UseRegister(m.right().node()), g.Label(cont->true_block()),
-                   g.Label(cont->false_block()));
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     DCHECK(cont->IsSet());
     selector->Emit(
@@ -1122,8 +1124,9 @@ void VisitWordCompare(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(inputs), input_count);
   DCHECK_GE(arraysize(outputs), output_count);
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -1228,7 +1231,8 @@ void VisitWordCompareZero(InstructionSelector* selector, Node* user,
   InstructionOperand* const value_operand = g.UseRegister(value);
   if (cont->IsBranch()) {
     selector->Emit(opcode, nullptr, value_operand, value_operand,
-                   g.Label(cont->true_block()), g.Label(cont->false_block()));
+                   g.Label(cont->true_block()),
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
                    value_operand);

src/compiler/arm64/instruction-selector-arm64.cc

@@ -219,8 +219,9 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(inputs), input_count);
   DCHECK_GE(arraysize(outputs), output_count);
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -1162,7 +1163,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
   opcode = cont->Encode(opcode);
   if (cont->IsBranch()) {
     selector->Emit(opcode, NULL, left, right, g.Label(cont->true_block()),
-                   g.Label(cont->false_block()));
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     DCHECK(cont->IsSet());
     selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
@@ -1350,7 +1351,8 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
                g.UseRegister(m.left().node()),
                g.TempImmediate(
                    base::bits::CountTrailingZeros32(m.right().Value())),
-               g.Label(cont.true_block()), g.Label(cont.false_block()));
+               g.Label(cont.true_block()),
+               g.Label(cont.false_block()))->MarkAsControl();
           return;
         }
         return VisitWordCompare(this, value, kArm64Tst32, &cont, true,
@@ -1367,7 +1369,8 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
                g.UseRegister(m.left().node()),
                g.TempImmediate(
                    base::bits::CountTrailingZeros64(m.right().Value())),
-               g.Label(cont.true_block()), g.Label(cont.false_block()));
+               g.Label(cont.true_block()),
+               g.Label(cont.false_block()))->MarkAsControl();
           return;
         }
         return VisitWordCompare(this, value, kArm64Tst, &cont, true,
@@ -1380,7 +1383,8 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
 
   // Branch could not be combined with a compare, compare against 0 and branch.
   Emit(cont.Encode(kArm64CompareAndBranch32), NULL, g.UseRegister(value),
-       g.Label(cont.true_block()), g.Label(cont.false_block()));
+       g.Label(cont.true_block()),
+       g.Label(cont.false_block()))->MarkAsControl();
 }
 
 

src/compiler/ia32/instruction-selector-ia32.cc

@@ -374,8 +374,9 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(inputs), input_count);
   DCHECK_GE(arraysize(outputs), output_count);
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -775,7 +776,8 @@ void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
   IA32OperandGenerator g(selector);
   if (cont->IsBranch()) {
     selector->Emit(cont->Encode(opcode), NULL, left, right,
-                   g.Label(cont->true_block()), g.Label(cont->false_block()));
+                   g.Label(cont->true_block()),
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     DCHECK(cont->IsSet());
     // TODO(titzer): Needs byte register.

src/compiler/instruction-selector.cc

@@ -997,7 +997,7 @@ void InstructionSelector::VisitConstant(Node* node) {
 void InstructionSelector::VisitGoto(BasicBlock* target) {
   // jump to the next block.
   OperandGenerator g(this);
-  Emit(kArchJmp, NULL, g.Label(target));
+  Emit(kArchJmp, NULL, g.Label(target))->MarkAsControl();
 }
 
 

src/compiler/instruction.h

@@ -454,7 +454,7 @@ class Instruction : public ZoneObject {
     return FlagsConditionField::decode(opcode());
   }
 
-  // TODO(titzer): make call into a flag.
+  // TODO(titzer): make control and call into flags.
   static Instruction* New(Zone* zone, InstructionCode opcode) {
     return New(zone, opcode, 0, NULL, 0, NULL, 0, NULL);
   }
@@ -476,10 +476,17 @@ class Instruction : public ZoneObject {
         opcode, output_count, outputs, input_count, inputs, temp_count, temps);
   }
 
+  // TODO(titzer): another holdover from lithium days; register allocator
+  // should not need to know about control instructions.
+  Instruction* MarkAsControl() {
+    bit_field_ = IsControlField::update(bit_field_, true);
+    return this;
+  }
   Instruction* MarkAsCall() {
     bit_field_ = IsCallField::update(bit_field_, true);
     return this;
   }
+  bool IsControl() const { return IsControlField::decode(bit_field_); }
   bool IsCall() const { return IsCallField::decode(bit_field_); }
   bool NeedsPointerMap() const { return IsCall(); }
   bool HasPointerMap() const { return pointer_map_ != NULL; }
@@ -521,7 +528,8 @@ class Instruction : public ZoneObject {
   explicit Instruction(InstructionCode opcode)
       : opcode_(opcode),
         bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) |
-                   TempCountField::encode(0) | IsCallField::encode(false)),
+                   TempCountField::encode(0) | IsCallField::encode(false) |
+                   IsControlField::encode(false)),
         pointer_map_(NULL) {}
 
   Instruction(InstructionCode opcode, size_t output_count,
@@ -532,7 +540,7 @@ class Instruction : public ZoneObject {
         bit_field_(OutputCountField::encode(output_count) |
                    InputCountField::encode(input_count) |
                    TempCountField::encode(temp_count) |
-                   IsCallField::encode(false)),
+                   IsCallField::encode(false) | IsControlField::encode(false)),
         pointer_map_(NULL) {
     for (size_t i = 0; i < output_count; ++i) {
       operands_[i] = outputs[i];
@@ -550,6 +558,7 @@ class Instruction : public ZoneObject {
   typedef BitField<size_t, 8, 16> InputCountField;
   typedef BitField<size_t, 24, 6> TempCountField;
   typedef BitField<bool, 30, 1> IsCallField;
+  typedef BitField<bool, 31, 1> IsControlField;
 
   InstructionCode opcode_;
   uint32_t bit_field_;

src/compiler/mips/instruction-selector-mips.cc

@@ -105,8 +105,9 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(inputs), input_count);
   DCHECK_GE(arraysize(outputs), output_count);
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -585,7 +586,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
   opcode = cont->Encode(opcode);
   if (cont->IsBranch()) {
     selector->Emit(opcode, NULL, left, right, g.Label(cont->true_block()),
-                   g.Label(cont->false_block()));
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     DCHECK(cont->IsSet());
     // TODO(plind): Revisit and test this path.
@@ -714,7 +715,8 @@ void VisitWordCompareZero(InstructionSelector* selector, Node* user,
   InstructionOperand* const value_operand = g.UseRegister(value);
   if (cont->IsBranch()) {
     selector->Emit(opcode, nullptr, value_operand, g.TempImmediate(0),
-                   g.Label(cont->true_block()), g.Label(cont->false_block()));
+                   g.Label(cont->true_block()),
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
                    g.TempImmediate(0));

src/compiler/mips64/instruction-selector-mips64.cc

@@ -146,8 +146,9 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(inputs), input_count);
   DCHECK_GE(arraysize(outputs), output_count);
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -776,7 +777,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
   opcode = cont->Encode(opcode);
   if (cont->IsBranch()) {
     selector->Emit(opcode, NULL, left, right, g.Label(cont->true_block()),
-                   g.Label(cont->false_block()));
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     DCHECK(cont->IsSet());
     selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
@@ -839,7 +840,8 @@ void EmitWordCompareZero(InstructionSelector* selector, InstructionCode opcode,
   InstructionOperand* const value_operand = g.UseRegister(value);
   if (cont->IsBranch()) {
     selector->Emit(opcode, nullptr, value_operand, g.TempImmediate(0),
-                   g.Label(cont->true_block()), g.Label(cont->false_block()));
+                   g.Label(cont->true_block()),
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
                    g.TempImmediate(0));

src/compiler/register-allocator.cc

@@ -2389,11 +2389,9 @@ LiveRange* RegisterAllocator::SplitRangeAt(LiveRange* range,
   if (pos.Value() <= range->Start().Value()) return range;
 
   // We can't properly connect liveranges if split occured at the end
-  // a block.
+  // of control instruction.
   DCHECK(pos.IsInstructionStart() ||
-         code()
-                 ->GetInstructionBlock(pos.InstructionIndex())
-                 ->last_instruction_index() != pos.InstructionIndex());
+         !InstructionAt(pos.InstructionIndex())->IsControl());
 
   int vreg = GetVirtualRegister();
   if (!AllocationOk()) return nullptr;

src/compiler/x64/instruction-selector-x64.cc

@@ -351,8 +351,9 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
   DCHECK_GE(arraysize(inputs), input_count);
   DCHECK_GE(arraysize(outputs), output_count);
 
-  selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
-                 inputs);
+  Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
+                                      outputs, input_count, inputs);
+  if (cont->IsBranch()) instr->MarkAsControl();
 }
 
 
@@ -976,7 +977,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
   opcode = cont->Encode(opcode);
   if (cont->IsBranch()) {
     selector->Emit(opcode, NULL, left, right, g.Label(cont->true_block()),
-                   g.Label(cont->false_block()));
+                   g.Label(cont->false_block()))->MarkAsControl();
   } else {
     DCHECK(cont->IsSet());
     selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);

test/cctest/compiler/test-instruction.cc

@@ -208,7 +208,7 @@ TEST(InstructionIsGapAt) {
 
   R.allocCode();
   TestInstr* i0 = TestInstr::New(R.zone(), 100);
-  TestInstr* g = TestInstr::New(R.zone(), 103);
+  TestInstr* g = TestInstr::New(R.zone(), 103)->MarkAsControl();
   R.code->StartBlock(b0->GetRpoNumber());
   R.code->AddInstruction(i0);
   R.code->AddInstruction(g);
@@ -231,14 +231,14 @@ TEST(InstructionIsGapAt2) {
 
   R.allocCode();
   TestInstr* i0 = TestInstr::New(R.zone(), 100);
-  TestInstr* g = TestInstr::New(R.zone(), 103);
+  TestInstr* g = TestInstr::New(R.zone(), 103)->MarkAsControl();
   R.code->StartBlock(b0->GetRpoNumber());
   R.code->AddInstruction(i0);
   R.code->AddInstruction(g);
   R.code->EndBlock(b0->GetRpoNumber());
 
   TestInstr* i1 = TestInstr::New(R.zone(), 102);
-  TestInstr* g1 = TestInstr::New(R.zone(), 104);
+  TestInstr* g1 = TestInstr::New(R.zone(), 104)->MarkAsControl();
   R.code->StartBlock(b1->GetRpoNumber());
   R.code->AddInstruction(i1);
   R.code->AddInstruction(g1);
@@ -259,7 +259,7 @@ TEST(InstructionAddGapMove) {
 
   R.allocCode();
   TestInstr* i0 = TestInstr::New(R.zone(), 100);
-  TestInstr* g = TestInstr::New(R.zone(), 103);
+  TestInstr* g = TestInstr::New(R.zone(), 103)->MarkAsControl();
   R.code->StartBlock(b0->GetRpoNumber());
   R.code->AddInstruction(i0);
   R.code->AddInstruction(g);

test/cctest/compiler/test-jump-threading.cc

@@ -32,8 +32,8 @@ class TestCode : public HandleAndZoneScope {
   int Jump(int target) {
     Start();
     InstructionOperand* ops[] = {UseRpo(target)};
-    sequence_.AddInstruction(
-        Instruction::New(main_zone(), kArchJmp, 0, NULL, 1, ops, 0, NULL));
+    sequence_.AddInstruction(Instruction::New(main_zone(), kArchJmp, 0, NULL, 1,
+                                              ops, 0, NULL)->MarkAsControl());
     int pos = static_cast<int>(sequence_.instructions().size() - 1);
     End();
     return pos;
@@ -47,8 +47,8 @@ class TestCode : public HandleAndZoneScope {
     InstructionOperand* ops[] = {UseRpo(ttarget), UseRpo(ftarget)};
     InstructionCode code = 119 | FlagsModeField::encode(kFlags_branch) |
                            FlagsConditionField::encode(kEqual);
-    sequence_.AddInstruction(
-        Instruction::New(main_zone(), code, 0, NULL, 2, ops, 0, NULL));
+    sequence_.AddInstruction(Instruction::New(main_zone(), code, 0, NULL, 2,
+                                              ops, 0, NULL)->MarkAsControl());
     int pos = static_cast<int>(sequence_.instructions().size() - 1);
     End();
     return pos;

test/unittests/compiler/instruction-sequence-unittest.cc

@@ -260,20 +260,22 @@ int InstructionSequenceTest::EmitBranch(TestOperand input_op) {
                                 ConvertInputOp(Imm()), ConvertInputOp(Imm())};
   InstructionCode opcode = kArchJmp | FlagsModeField::encode(kFlags_branch) |
                            FlagsConditionField::encode(kEqual);
-  auto instruction = NewInstruction(opcode, 0, nullptr, 4, inputs);
+  auto instruction =
+      NewInstruction(opcode, 0, nullptr, 4, inputs)->MarkAsControl();
   return AddInstruction(NewIndex(), instruction);
 }
 
 
 int InstructionSequenceTest::EmitFallThrough() {
-  auto instruction = NewInstruction(kArchNop, 0, nullptr);
+  auto instruction = NewInstruction(kArchNop, 0, nullptr)->MarkAsControl();
   return AddInstruction(NewIndex(), instruction);
 }
 
 
 int InstructionSequenceTest::EmitJump() {
   InstructionOperand* inputs[1]{ConvertInputOp(Imm())};
-  auto instruction = NewInstruction(kArchJmp, 0, nullptr, 1, inputs);
+  auto instruction =
+      NewInstruction(kArchJmp, 0, nullptr, 1, inputs)->MarkAsControl();
   return AddInstruction(NewIndex(), instruction);
 }