Commit 70e0d697 authored by Deepti Gandluri's avatar Deepti Gandluri Committed by Commit Bot

[wasm-simd] Fix code generation for Integer Splats.

Integer splats should use an operand when a register is not allocated.

Bug: V8:8927
Change-Id: I14c80b7b073fae3754ec32f4fa8605af399ef341
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1513102Reviewed-by: 's avatarBill Budge <bbudge@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#60138}
parent acfed8a0
......@@ -2344,7 +2344,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
}
case kX64I32x4Splat: {
XMMRegister dst = i.OutputSimd128Register();
__ movd(dst, i.InputRegister(0));
if (instr->InputAt(0)->IsRegister()) {
__ movd(dst, i.InputRegister(0));
} else {
__ movd(dst, i.InputOperand(0));
}
__ pshufd(dst, dst, 0x0);
break;
}
......@@ -2543,7 +2547,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
}
case kX64I16x8Splat: {
XMMRegister dst = i.OutputSimd128Register();
__ movd(dst, i.InputRegister(0));
if (instr->InputAt(0)->IsRegister()) {
__ movd(dst, i.InputRegister(0));
} else {
__ movd(dst, i.InputOperand(0));
}
__ pshuflw(dst, dst, 0x0);
__ pshufd(dst, dst, 0x0);
break;
......@@ -2728,7 +2736,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kX64I8x16Splat: {
CpuFeatureScope sse_scope(tasm(), SSSE3);
XMMRegister dst = i.OutputSimd128Register();
__ movd(dst, i.InputRegister(0));
if (instr->InputAt(0)->IsRegister()) {
__ movd(dst, i.InputRegister(0));
} else {
__ movd(dst, i.InputOperand(0));
}
__ xorps(kScratchDoubleReg, kScratchDoubleReg);
__ pshufb(dst, kScratchDoubleReg);
break;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment