[ptr-compr][arm64] Change compression scheme to zero upper 32-bits

Also adding LoadTaggedPointerField and LoadAnyTaggedField that were
missed on previous CLs.

Similar to X64's CL:
https://chromium-review.googlesource.com/c/v8/v8/+/1460953

Bug: v8:7703
Change-Id: I9c917aadace65d45204c3360aeeb7e9ece296e70
Reviewed-on: https://chromium-review.googlesource.com/c/1475474Reviewed-by: Igor Sheludko <ishell@chromium.org>
Reviewed-by: Sigurd Schneider <sigurds@chromium.org>
Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org>
Cr-Commit-Position: refs/heads/master@{#59655}

src/arm64/macro-assembler-arm64.cc

@@ -2769,56 +2769,34 @@ void TurboAssembler::SmiUntagField(Register dst, const MemOperand& src) {
 
 void TurboAssembler::StoreTaggedField(const Register& value,
                                       const MemOperand& dst_field_operand) {
+#ifdef V8_COMPRESS_POINTERS
+  RecordComment("[ StoreTagged");
+  // Use temporary register to zero out and don't trash value register
+  UseScratchRegisterScope temps(this);
+  Register compressed_value = temps.AcquireX();
+  Uxtw(compressed_value, value);
+  Str(compressed_value, dst_field_operand);
+  RecordComment("]");
+#else
   Str(value, dst_field_operand);
+#endif
 }
 
 void TurboAssembler::DecompressTaggedSigned(const Register& destination,
                                             const MemOperand& field_operand) {
   RecordComment("[ DecompressTaggedSigned");
-#ifdef DEBUG
-  UseScratchRegisterScope temps(this);
-  Register expected_value = temps.AcquireX();
-  DCHECK(!AreAliased(destination, expected_value));
-  Ldr(expected_value, field_operand);
-  mov(destination, expected_value);
-#else
-  // TODO(ishell): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
+  // TODO(solanes): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
   Ldr(destination, field_operand);
-#endif
   Sxtw(destination, destination);
-#ifdef DEBUG
-  Label check_passed;
-  Cmp(destination, expected_value);
-  B(eq, &check_passed);
-  RecordComment("DecompressTaggedSigned failed");
-  brk(0);
-  bind(&check_passed);
-#endif
   RecordComment("]");
 }
 
 void TurboAssembler::DecompressTaggedPointer(const Register& destination,
                                              const MemOperand& field_operand) {
   RecordComment("[ DecompressTaggedPointer");
-#ifdef DEBUG
-  UseScratchRegisterScope temps(this);
-  Register expected_value = temps.AcquireX();
-  DCHECK(!AreAliased(destination, expected_value));
-  Ldr(expected_value, field_operand);
-  mov(destination, expected_value);
-#else
-  // TODO(ishell): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
+  // TODO(solanes): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
   Ldr(destination, field_operand);
-#endif
   Add(destination, kRootRegister, Operand(destination, SXTW));
-#ifdef DEBUG
-  Label check_passed;
-  Cmp(destination, expected_value);
-  B(eq, &check_passed);
-  RecordComment("DecompressTaggedPointer failed");
-  brk(0);
-  bind(&check_passed);
-#endif
   RecordComment("]");
 }
 
@@ -2826,15 +2804,8 @@ void TurboAssembler::DecompressAnyTagged(const Register& destination,
                                          const MemOperand& field_operand) {
   RecordComment("[ DecompressAnyTagged");
   UseScratchRegisterScope temps(this);
-#ifdef DEBUG
-  Register expected_value = temps.AcquireX();
-  DCHECK(!AreAliased(destination, expected_value));
-  Ldr(expected_value, field_operand);
-  mov(destination, expected_value);
-#else
-  // TODO(ishell): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
+  // TODO(solanes): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
   Ldr(destination, field_operand);
-#endif
   // Branchlessly compute |masked_root|:
   // masked_root = HAS_SMI_TAG(destination) ? 0 : kRootRegister;
   STATIC_ASSERT((kSmiTagSize == 1) && (kSmiTag == 0));
@@ -2845,14 +2816,6 @@ void TurboAssembler::DecompressAnyTagged(const Register& destination,
   // Now this add operation will either leave the value unchanged if it is a smi
   // or add the isolate root if it is a heap object.
   Add(destination, masked_root, Operand(destination, SXTW));
-#ifdef DEBUG
-  Label check_passed;
-  Cmp(destination, expected_value);
-  B(eq, &check_passed);
-  RecordComment("Decompression failed: Tagged");
-  brk(0);
-  bind(&check_passed);
-#endif
   RecordComment("]");
 }
 
@@ -3107,7 +3070,7 @@ void MacroAssembler::RecordWrite(Register object, Register address,
     UseScratchRegisterScope temps(this);
     Register temp = temps.AcquireX();
 
-    Ldr(temp, MemOperand(address));
+    LoadTaggedPointerField(temp, MemOperand(address));
     Cmp(temp, value);
     Check(eq, AbortReason::kWrongAddressOrValuePassedToRecordWrite);
   }

src/builtins/arm64/builtins-arm64.cc

@@ -1778,7 +1778,8 @@ void Builtins::Generate_InterpreterOnStackReplacement(MacroAssembler* masm) {
 
   // Load deoptimization data from the code object.
   // <deopt_data> = <code>[#deoptimization_data_offset]
-  __ Ldr(x1, MemOperand(x0, Code::kDeoptimizationDataOffset - kHeapObjectTag));
+  __ LoadTaggedPointerField(
+      x1, FieldMemOperand(x0, Code::kDeoptimizationDataOffset));
 
   // Load the OSR entrypoint offset from the deoptimization data.
   // <osr_offset> = <deopt_data>[#header_size + #osr_pc_offset]
@@ -2242,7 +2243,7 @@ void Builtins::Generate_CallOrConstructVarargs(MacroAssembler* masm,
     // TODO(all): Consider using Ldp and Stp.
     __ Bind(&loop);
     __ Sub(len, len, 1);
-    __ Ldr(scratch, MemOperand(src, kPointerSize, PostIndex));
+    __ LoadAnyTaggedField(scratch, MemOperand(src, kPointerSize, PostIndex));
     __ Cmp(scratch, the_hole_value);
     __ Csel(scratch, scratch, undefined_value, ne);
     __ Poke(scratch, Operand(len, LSL, kPointerSizeLog2));
@@ -2553,7 +2554,7 @@ void Generate_PushBoundArguments(MacroAssembler* masm) {
         __ Lsl(counter, bound_argc, kPointerSizeLog2);
         __ Bind(&loop);
         __ Sub(counter, counter, kPointerSize);
-        __ Ldr(scratch, MemOperand(bound_argv, counter));
+        __ LoadAnyTaggedField(scratch, MemOperand(bound_argv, counter));
         // Poke into claimed area of stack.
         __ Str(scratch, MemOperand(copy_to, kPointerSize, PostIndex));
         __ Cbnz(counter, &loop);

src/compiler/backend/arm64/code-generator-arm64.cc

@@ -565,7 +565,8 @@ void CodeGenerator::BailoutIfDeoptimized() {
   UseScratchRegisterScope temps(tasm());
   Register scratch = temps.AcquireX();
   int offset = Code::kCodeDataContainerOffset - Code::kHeaderSize;
-  __ Ldr(scratch, MemOperand(kJavaScriptCallCodeStartRegister, offset));
+  __ LoadTaggedPointerField(
+      scratch, MemOperand(kJavaScriptCallCodeStartRegister, offset));
   __ Ldr(scratch,
          FieldMemOperand(scratch, CodeDataContainer::kKindSpecificFlagsOffset));
   Label not_deoptimized;
@@ -2525,9 +2526,11 @@ void CodeGenerator::AssembleConstructFrame() {
       } break;
       case CallDescriptor::kCallWasmImportWrapper: {
         UseScratchRegisterScope temps(tasm());
-        __ ldr(kJSFunctionRegister,
+        __ LoadTaggedPointerField(
+            kJSFunctionRegister,
             FieldMemOperand(kWasmInstanceRegister, Tuple2::kValue2Offset));
-        __ ldr(kWasmInstanceRegister,
+        __ LoadTaggedPointerField(
+            kWasmInstanceRegister,
             FieldMemOperand(kWasmInstanceRegister, Tuple2::kValue1Offset));
         __ Claim(required_slots +
                  2);  // Claim extra slots for marker + instance.