A64: UseRegisterAtStart for rhs of LMulS

BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/191283002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19814 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent 85800eff
......@@ -1906,8 +1906,7 @@ LInstruction* LChunkBuilder::DoMul(HMul* instr) {
// allocated for the second operand.
LInstruction* result;
if (instr->representation().IsSmi()) {
// TODO(jbramley/rmcilroy): Fix LMulS so we can UseRegisterAtStart here.
LOperand* right = UseRegister(most_const);
LOperand* right = UseRegisterAtStart(most_const);
result = DefineAsRegister(new(zone()) LMulS(left, right));
} else {
LOperand* right = UseRegisterAtStart(most_const);
......
......@@ -4318,7 +4318,7 @@ void LCodeGen::DoMulI(LMulI* instr) {
bool bailout_on_minus_zero =
instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero);
if (bailout_on_minus_zero) {
if (bailout_on_minus_zero && !left.Is(right)) {
// If one operand is zero and the other is negative, the result is -0.
// - Set Z (eq) if either left or right, or both, are 0.
__ Cmp(left, 0);
......@@ -4348,7 +4348,7 @@ void LCodeGen::DoMulS(LMulS* instr) {
bool bailout_on_minus_zero =
instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero);
if (bailout_on_minus_zero) {
if (bailout_on_minus_zero && !left.Is(right)) {
// If one operand is zero and the other is negative, the result is -0.
// - Set Z (eq) if either left or right, or both, are 0.
__ Cmp(left, 0);
......@@ -4366,10 +4366,25 @@ void LCodeGen::DoMulS(LMulS* instr) {
__ SmiTag(result);
DeoptimizeIf(ne, instr->environment());
} else {
// TODO(jbramley): This could be rewritten to support UseRegisterAtStart.
ASSERT(!AreAliased(result, right));
__ SmiUntag(result, left);
__ Mul(result, result, right);
if (AreAliased(result, left, right)) {
// All three registers are the same: half untag the input and then
// multiply, giving a tagged result.
STATIC_ASSERT((kSmiShift % 2) == 0);
__ Asr(result, left, kSmiShift / 2);
__ Mul(result, result, result);
} else if (result.Is(left) && !left.Is(right)) {
// Registers result and left alias, right is distinct: untag left into
// result, and then multiply by right, giving a tagged result.
__ SmiUntag(result, left);
__ Mul(result, result, right);
} else {
ASSERT(!left.Is(result));
// Registers result and right alias, left is distinct, or all registers
// are distinct: untag right into result, and then multiply by left,
// giving a tagged result.
__ SmiUntag(result, right);
__ Mul(result, left, result);
}
}
}
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment