[riscv64] Add s10 into allocate reg

  3103425 had delete s10 from scratch reg

Bug: v8:12124
Change-Id: I23b34c7ce28f129137683204f12a19a46325f91a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3156291Reviewed-by: Ji Qiu <qiuji@iscas.ac.cn>
Commit-Queue: Ji Qiu <qiuji@iscas.ac.cn>
Auto-Submit: Yahan Lu <yahan@iscas.ac.cn>
Cr-Commit-Position: refs/heads/main@{#76861}

src/codegen/riscv64/register-riscv64.h

@@ -30,7 +30,7 @@ namespace internal {
 #define ALWAYS_ALLOCATABLE_GENERAL_REGISTERS(V)  \
              V(a0)  V(a1)  V(a2)  V(a3) \
              V(a4)  V(a5)  V(a6)  V(a7)  V(t0)  \
-             V(t1)  V(t2)  V(t4)  V(s7)  V(s8) V(s9)
+             V(t1)  V(t2)  V(t4)  V(s7)  V(s8) V(s9) V(s10)
 
 #ifdef V8_COMPRESS_POINTERS_IN_SHARED_CAGE
 #define MAYBE_ALLOCATABLE_GENERAL_REGISTERS(V)