Commit 6e4769bf authored by Junliang Yan's avatar Junliang Yan Committed by Commit Bot

s390x: move ceil/floor/trunc/nearestint op to TurboAssm

Change-Id: I2925b0d1378736d3b357e5be7070b6b37510cbff
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2840325Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#74070}
parent aad52cc5
...@@ -231,6 +231,39 @@ void TurboAssembler::FloatMin(DoubleRegister result_reg, ...@@ -231,6 +231,39 @@ void TurboAssembler::FloatMin(DoubleRegister result_reg,
} }
bind(&done); bind(&done);
} }
void TurboAssembler::CeilF32(DoubleRegister dst, DoubleRegister src) {
fiebra(ROUND_TOWARD_POS_INF, dst, src);
}
void TurboAssembler::CeilF64(DoubleRegister dst, DoubleRegister src) {
fidbra(ROUND_TOWARD_POS_INF, dst, src);
}
void TurboAssembler::FloorF32(DoubleRegister dst, DoubleRegister src) {
fiebra(ROUND_TOWARD_NEG_INF, dst, src);
}
void TurboAssembler::FloorF64(DoubleRegister dst, DoubleRegister src) {
fidbra(ROUND_TOWARD_NEG_INF, dst, src);
}
void TurboAssembler::TruncF32(DoubleRegister dst, DoubleRegister src) {
fiebra(ROUND_TOWARD_0, dst, src);
}
void TurboAssembler::TruncF64(DoubleRegister dst, DoubleRegister src) {
fidbra(ROUND_TOWARD_0, dst, src);
}
void TurboAssembler::NearestIntF32(DoubleRegister dst, DoubleRegister src) {
fiebra(ROUND_TO_NEAREST_TO_EVEN, dst, src);
}
void TurboAssembler::NearestIntF64(DoubleRegister dst, DoubleRegister src) {
fidbra(ROUND_TO_NEAREST_TO_EVEN, dst, src);
}
int TurboAssembler::RequiredStackSizeForCallerSaved(SaveFPRegsMode fp_mode, int TurboAssembler::RequiredStackSizeForCallerSaved(SaveFPRegsMode fp_mode,
Register exclusion1, Register exclusion1,
Register exclusion2, Register exclusion2,
......
...@@ -70,6 +70,15 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { ...@@ -70,6 +70,15 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
DoubleRegister right_reg); DoubleRegister right_reg);
void FloatMin(DoubleRegister result_reg, DoubleRegister left_reg, void FloatMin(DoubleRegister result_reg, DoubleRegister left_reg,
DoubleRegister right_reg); DoubleRegister right_reg);
void CeilF32(DoubleRegister dst, DoubleRegister src);
void CeilF64(DoubleRegister dst, DoubleRegister src);
void FloorF32(DoubleRegister dst, DoubleRegister src);
void FloorF64(DoubleRegister dst, DoubleRegister src);
void TruncF32(DoubleRegister dst, DoubleRegister src);
void TruncF64(DoubleRegister dst, DoubleRegister src);
void NearestIntF32(DoubleRegister dst, DoubleRegister src);
void NearestIntF64(DoubleRegister dst, DoubleRegister src);
void LoadFromConstantsTable(Register destination, void LoadFromConstantsTable(Register destination,
int constant_index) override; int constant_index) override;
void LoadRootRegisterOffset(Register destination, intptr_t offset) override; void LoadRootRegisterOffset(Register destination, intptr_t offset) override;
......
...@@ -1692,16 +1692,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1692,16 +1692,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ASSEMBLE_UNARY_OP(D_DInstr(sqdbr), nullInstr, nullInstr); ASSEMBLE_UNARY_OP(D_DInstr(sqdbr), nullInstr, nullInstr);
break; break;
case kS390_FloorFloat: case kS390_FloorFloat:
__ fiebra(ROUND_TOWARD_NEG_INF, i.OutputDoubleRegister(), __ FloorF32(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
i.InputDoubleRegister(0));
break; break;
case kS390_CeilFloat: case kS390_CeilFloat:
__ fiebra(ROUND_TOWARD_POS_INF, i.OutputDoubleRegister(), __ CeilF32(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
i.InputDoubleRegister(0));
break; break;
case kS390_TruncateFloat: case kS390_TruncateFloat:
__ fiebra(ROUND_TOWARD_0, i.OutputDoubleRegister(), __ TruncF32(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
i.InputDoubleRegister(0));
break; break;
// Double operations // Double operations
case kS390_ModDouble: case kS390_ModDouble:
...@@ -1797,16 +1794,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1797,16 +1794,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ lpdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); __ lpdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break; break;
case kS390_FloorDouble: case kS390_FloorDouble:
__ fidbra(ROUND_TOWARD_NEG_INF, i.OutputDoubleRegister(), __ FloorF64(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
i.InputDoubleRegister(0));
break; break;
case kS390_CeilDouble: case kS390_CeilDouble:
__ fidbra(ROUND_TOWARD_POS_INF, i.OutputDoubleRegister(), __ CeilF64(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
i.InputDoubleRegister(0));
break; break;
case kS390_TruncateDouble: case kS390_TruncateDouble:
__ fidbra(ROUND_TOWARD_0, i.OutputDoubleRegister(), __ TruncF64(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
i.InputDoubleRegister(0));
break; break;
case kS390_RoundDouble: case kS390_RoundDouble:
__ fidbra(ROUND_TO_NEAREST_AWAY_FROM_0, i.OutputDoubleRegister(), __ fidbra(ROUND_TO_NEAREST_AWAY_FROM_0, i.OutputDoubleRegister(),
......
...@@ -1516,23 +1516,23 @@ BINOP_LIST(EMIT_BINOP_FUNCTION) ...@@ -1516,23 +1516,23 @@ BINOP_LIST(EMIT_BINOP_FUNCTION)
#undef LFR_TO_REG #undef LFR_TO_REG
bool LiftoffAssembler::emit_f32_ceil(DoubleRegister dst, DoubleRegister src) { bool LiftoffAssembler::emit_f32_ceil(DoubleRegister dst, DoubleRegister src) {
fiebra(ROUND_TOWARD_POS_INF, dst, src); CeilF32(dst, src);
return true; return true;
} }
bool LiftoffAssembler::emit_f32_floor(DoubleRegister dst, DoubleRegister src) { bool LiftoffAssembler::emit_f32_floor(DoubleRegister dst, DoubleRegister src) {
fiebra(ROUND_TOWARD_NEG_INF, dst, src); FloorF32(dst, src);
return true; return true;
} }
bool LiftoffAssembler::emit_f32_trunc(DoubleRegister dst, DoubleRegister src) { bool LiftoffAssembler::emit_f32_trunc(DoubleRegister dst, DoubleRegister src) {
fiebra(ROUND_TOWARD_0, dst, src); TruncF32(dst, src);
return true; return true;
} }
bool LiftoffAssembler::emit_f32_nearest_int(DoubleRegister dst, bool LiftoffAssembler::emit_f32_nearest_int(DoubleRegister dst,
DoubleRegister src) { DoubleRegister src) {
fiebra(ROUND_TO_NEAREST_TO_EVEN, dst, src); NearestIntF32(dst, src);
return true; return true;
} }
...@@ -1547,23 +1547,23 @@ void LiftoffAssembler::emit_f32_min(DoubleRegister dst, DoubleRegister lhs, ...@@ -1547,23 +1547,23 @@ void LiftoffAssembler::emit_f32_min(DoubleRegister dst, DoubleRegister lhs,
} }
bool LiftoffAssembler::emit_f64_ceil(DoubleRegister dst, DoubleRegister src) { bool LiftoffAssembler::emit_f64_ceil(DoubleRegister dst, DoubleRegister src) {
fidbra(ROUND_TOWARD_POS_INF, dst, src); CeilF64(dst, src);
return true; return true;
} }
bool LiftoffAssembler::emit_f64_floor(DoubleRegister dst, DoubleRegister src) { bool LiftoffAssembler::emit_f64_floor(DoubleRegister dst, DoubleRegister src) {
fidbra(ROUND_TOWARD_NEG_INF, dst, src); FloorF64(dst, src);
return true; return true;
} }
bool LiftoffAssembler::emit_f64_trunc(DoubleRegister dst, DoubleRegister src) { bool LiftoffAssembler::emit_f64_trunc(DoubleRegister dst, DoubleRegister src) {
fidbra(ROUND_TOWARD_0, dst, src); TruncF64(dst, src);
return true; return true;
} }
bool LiftoffAssembler::emit_f64_nearest_int(DoubleRegister dst, bool LiftoffAssembler::emit_f64_nearest_int(DoubleRegister dst,
DoubleRegister src) { DoubleRegister src) {
fidbra(ROUND_TO_NEAREST_TO_EVEN, dst, src); NearestIntF64(dst, src);
return true; return true;
} }
......
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