ppc: [liftoff] implement f32/f64 add/sub/mul/div

Change-Id: I8d3b2e1bc5d3e5f437bc8f1bc50299459fbc7ad9
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3049084Reviewed-by: Milad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75899}

src/codegen/ppc/macro-assembler-ppc.cc

@@ -2958,6 +2958,50 @@ void TurboAssembler::CmpU32(Register src1, Register src2, CRegister cr) {
   cmplw(src1, src2, cr);
 }
 
+void TurboAssembler::AddF64(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fadd(dst, lhs, rhs, r);
+}
+
+void TurboAssembler::SubF64(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fsub(dst, lhs, rhs, r);
+}
+
+void TurboAssembler::MulF64(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fmul(dst, lhs, rhs, r);
+}
+
+void TurboAssembler::DivF64(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fdiv(dst, lhs, rhs, r);
+}
+
+void TurboAssembler::AddF32(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fadd(dst, lhs, rhs, r);
+  frsp(dst, dst, r);
+}
+
+void TurboAssembler::SubF32(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fsub(dst, lhs, rhs, r);
+  frsp(dst, dst, r);
+}
+
+void TurboAssembler::MulF32(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fmul(dst, lhs, rhs, r);
+  frsp(dst, dst, r);
+}
+
+void TurboAssembler::DivF32(DoubleRegister dst, DoubleRegister lhs,
+                            DoubleRegister rhs, RCBit r) {
+  fdiv(dst, lhs, rhs, r);
+  frsp(dst, dst, r);
+}
+
 void MacroAssembler::CmpSmiLiteral(Register src1, Smi smi, Register scratch,
                                    CRegister cr) {
 #if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)

src/codegen/ppc/macro-assembler-ppc.h

@@ -238,6 +238,23 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   void ShiftRightS32(Register dst, Register src, Register value,
                      RCBit r = LeaveRC);
 
+  void AddF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+  void SubF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+  void MulF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+  void DivF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+  void AddF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+  void SubF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+  void MulF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+  void DivF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
+              RCBit r = LeaveRC);
+
   void Push(Register src) { push(src); }
   // Push a handle.
   void Push(Handle<HeapObject> handle);

src/wasm/baseline/ppc/liftoff-assembler-ppc.h

@@ -786,10 +786,6 @@ void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) {
 
 UNIMPLEMENTED_GP_UNOP(i32_clz)
 UNIMPLEMENTED_GP_UNOP(i32_ctz)
-UNIMPLEMENTED_FP_BINOP(f32_add)
-UNIMPLEMENTED_FP_BINOP(f32_sub)
-UNIMPLEMENTED_FP_BINOP(f32_mul)
-UNIMPLEMENTED_FP_BINOP(f32_div)
 UNIMPLEMENTED_FP_BINOP(f32_copysign)
 UNIMPLEMENTED_FP_UNOP(f32_abs)
 UNIMPLEMENTED_FP_UNOP(f32_neg)
@@ -798,10 +794,6 @@ UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f32_floor)
 UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f32_trunc)
 UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f32_nearest_int)
 UNIMPLEMENTED_FP_UNOP(f32_sqrt)
-UNIMPLEMENTED_FP_BINOP(f64_add)
-UNIMPLEMENTED_FP_BINOP(f64_sub)
-UNIMPLEMENTED_FP_BINOP(f64_mul)
-UNIMPLEMENTED_FP_BINOP(f64_div)
 UNIMPLEMENTED_FP_BINOP(f64_copysign)
 UNIMPLEMENTED_FP_UNOP(f64_abs)
 UNIMPLEMENTED_FP_UNOP(f64_neg)
@@ -916,7 +908,23 @@ UNOP_LIST(EMIT_UNOP_FUNCTION)
   V(i64_sari, ShiftRightS64, LiftoffRegister, LiftoffRegister, int32_t,      \
     LFR_TO_REG, LFR_TO_REG, Operand, USE, , void)                            \
   V(i64_shri, ShiftRightU64, LiftoffRegister, LiftoffRegister, int32_t,      \
-    LFR_TO_REG, LFR_TO_REG, Operand, USE, , void)
+    LFR_TO_REG, LFR_TO_REG, Operand, USE, , void)                            \
+  V(f64_add, AddF64, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)                                                             \
+  V(f64_sub, SubF64, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)                                                             \
+  V(f64_mul, MulF64, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)                                                             \
+  V(f64_div, DivF64, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)                                                             \
+  V(f32_add, AddF32, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)                                                             \
+  V(f32_sub, SubF32, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)                                                             \
+  V(f32_mul, MulF32, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)                                                             \
+  V(f32_div, DivF32, DoubleRegister, DoubleRegister, DoubleRegister, , , ,   \
+    USE, , void)
 
 #define EMIT_BINOP_FUNCTION(name, instr, dtype, stype1, stype2, dcast, scast1, \
                             scast2, rcast, ret, return_type)                   \