[mips][loong64][compiler] Teach InstructionScheduler about protected memory accesses

Port commit e301d71f

Change-Id: I58bb66e86629b60bcb75b3cec3e293d75acc5f5c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3184290
Auto-Submit: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: Liu yu <liuyu@loongson.cn>
Commit-Queue: Liu yu <liuyu@loongson.cn>
Cr-Commit-Position: refs/heads/main@{#77074}

src/compiler/backend/loong64/instruction-codes-loong64.h

@@ -11,7 +11,12 @@ namespace compiler {
 
 // LOONG64-specific opcodes that specify which assembly sequence to emit.
 // Most opcodes specify a single instruction.
+
+// Opcodes that support a MemoryAccessMode.
+#define TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V)  // None.
+
 #define TARGET_ARCH_OPCODE_LIST(V)                   \
+  TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V) \
   V(Loong64Add_d)                                    \
   V(Loong64Add_w)                                    \
   V(Loong64AddOvf_d)                                 \

src/compiler/backend/mips/instruction-codes-mips.h

@@ -11,7 +11,12 @@ namespace compiler {
 
 // MIPS-specific opcodes that specify which assembly sequence to emit.
 // Most opcodes specify a single instruction.
+
+// Opcodes that support a MemoryAccessMode.
+#define TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V)  // None.
+
 #define TARGET_ARCH_OPCODE_LIST(V)                   \
+  TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V) \
   V(MipsAdd)                                         \
   V(MipsAddOvf)                                      \
   V(MipsSub)                                         \

src/compiler/backend/mips64/instruction-codes-mips64.h

@@ -11,7 +11,12 @@ namespace compiler {
 
 // MIPS64-specific opcodes that specify which assembly sequence to emit.
 // Most opcodes specify a single instruction.
+
+// Opcodes that support a MemoryAccessMode.
+#define TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V)  // None.
+
 #define TARGET_ARCH_OPCODE_LIST(V)                   \
+  TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V) \
   V(Mips64Add)                                       \
   V(Mips64Dadd)                                      \
   V(Mips64DaddOvf)                                   \