PPC: clear VXCVI before doing a conversion

This bit may not get cleared automatically and could show
results from older executed instructions.

Change-Id: I5976f9a6c5bf87b1a63ef0f35493b222729e20f6
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3812037Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#82237}

src/wasm/baseline/ppc/liftoff-assembler-ppc.h

@@ -1464,6 +1464,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
       fcmpu(src.fp(), kScratchDoubleReg);
       bunordered(trap);
 
+      mtfsb0(VXCVI);  // clear FPSCR:VXCVI bit
       fctiwz(kScratchDoubleReg, src.fp());
       MovDoubleLowToInt(dst.gp(), kScratchDoubleReg);
       mcrfs(cr7, VXCVI);
@@ -1472,6 +1473,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
     }
     case kExprI32UConvertF64:
     case kExprI32UConvertF32: {
+      mtfsb0(VXCVI);  // clear FPSCR:VXCVI bit
       ConvertDoubleToUnsignedInt64(src.fp(), r0, kScratchDoubleReg,
                                    kRoundToZero);
       mcrfs(cr7, VXCVI);  // extract FPSCR field containing VXCVI into cr7
@@ -1487,6 +1489,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
       fcmpu(src.fp(), kScratchDoubleReg);
       bunordered(trap);
 
+      mtfsb0(VXCVI);  // clear FPSCR:VXCVI bit
       fctidz(kScratchDoubleReg, src.fp());
       MovDoubleToInt64(dst.gp(), kScratchDoubleReg);
       mcrfs(cr7, VXCVI);
@@ -1499,6 +1502,7 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
       fcmpu(src.fp(), kScratchDoubleReg);
       bunordered(trap);
 
+      mtfsb0(VXCVI);  // clear FPSCR:VXCVI bit
       fctiduz(kScratchDoubleReg, src.fp());
       MovDoubleToInt64(dst.gp(), kScratchDoubleReg);
       mcrfs(cr7, VXCVI);