Commit 5dc96ae2 authored by ahaas's avatar ahaas Committed by Commit bot

[wasm] mips: Turn off signalling NaN tests on mips and mips64.

I turn the test off for now. The problem is that mips does not deal with
signalling NaNs as expected.

@v8-mips-ports: Could it be that the mips simulator deals differently
with signalling NaNs than the actual hardware? The implementation that
is tested in these tests assumes that sNaN * 1.0 = qNaN, where the bits
of sNaN and qNaN are equal except for the most significant mantissa bit.
This assumption holds for the simulator, but seems not to hold for actual
mips hardware. Do you know more about that?

R=mstarzinger@chromium.org, titzer@chromium.org, v8-mips-ports@googlegroups.com

Review URL: https://codereview.chromium.org/1735673003

Cr-Commit-Position: refs/heads/master@{#34278}
parent fbbe5ed1
......@@ -4483,7 +4483,7 @@ void Simulator::CallInternal(byte* entry) {
// Set up the callee-saved registers with a known value. To be able to check
// that they are preserved properly across JS execution.
int32_t callee_saved_value = icount_;
int32_t callee_saved_value = static_cast<int32_t>(icount_);
set_register(s0, callee_saved_value);
set_register(s1, callee_saved_value);
set_register(s2, callee_saved_value);
......
......@@ -3097,8 +3097,9 @@ TEST(Run_Wasm_F64Max) {
}
}
// TODO(ahaas): Fix on arm and reenable.
#if !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_ARM64
// TODO(ahaas): Fix on arm and mips and reenable.
#if !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_MIPS && \
!V8_TARGET_ARCH_MIPS64
TEST(Run_Wasm_F32Min_Snan) {
// Test that the instruction does not return a signalling NaN.
......
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