Commit 5d9b6b30 authored by Milad Fa's avatar Milad Fa Committed by Commit Bot

PPC/S390 [simd]: optimize GeS ops on ppc and s390

Doing a `!(B > A)` which is equal to `A >= B`. This way
we use one less instruction.

Change-Id: I49d50f11096e2d542eaabab82c17225c83e89b63
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2846980Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#74125}
parent e5e59323
...@@ -2642,21 +2642,17 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -2642,21 +2642,17 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kPPC_I64x2GeS: { case kPPC_I64x2GeS: {
__ vcmpequd(kScratchSimd128Reg, i.InputSimd128Register(0), __ vcmpgtsd(kScratchSimd128Reg, i.InputSimd128Register(1),
i.InputSimd128Register(1)); i.InputSimd128Register(0));
__ vcmpgtsd(i.OutputSimd128Register(), i.InputSimd128Register(0), __ vnor(i.OutputSimd128Register(), kScratchSimd128Reg,
i.InputSimd128Register(1)); kScratchSimd128Reg);
__ vor(i.OutputSimd128Register(), i.OutputSimd128Register(),
kScratchSimd128Reg);
break; break;
} }
case kPPC_I32x4GeS: { case kPPC_I32x4GeS: {
__ vcmpequw(kScratchSimd128Reg, i.InputSimd128Register(0), __ vcmpgtsw(kScratchSimd128Reg, i.InputSimd128Register(1),
i.InputSimd128Register(1)); i.InputSimd128Register(0));
__ vcmpgtsw(i.OutputSimd128Register(), i.InputSimd128Register(0), __ vnor(i.OutputSimd128Register(), kScratchSimd128Reg,
i.InputSimd128Register(1)); kScratchSimd128Reg);
__ vor(i.OutputSimd128Register(), i.OutputSimd128Register(),
kScratchSimd128Reg);
break; break;
} }
case kPPC_I32x4GtU: { case kPPC_I32x4GtU: {
...@@ -2680,12 +2676,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -2680,12 +2676,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kPPC_I16x8GeS: { case kPPC_I16x8GeS: {
__ vcmpequh(kScratchSimd128Reg, i.InputSimd128Register(0), __ vcmpgtsh(kScratchSimd128Reg, i.InputSimd128Register(1),
i.InputSimd128Register(1)); i.InputSimd128Register(0));
__ vcmpgtsh(i.OutputSimd128Register(), i.InputSimd128Register(0), __ vnor(i.OutputSimd128Register(), kScratchSimd128Reg,
i.InputSimd128Register(1)); kScratchSimd128Reg);
__ vor(i.OutputSimd128Register(), i.OutputSimd128Register(),
kScratchSimd128Reg);
break; break;
} }
case kPPC_I16x8GtU: { case kPPC_I16x8GtU: {
...@@ -2708,12 +2702,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -2708,12 +2702,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kPPC_I8x16GeS: { case kPPC_I8x16GeS: {
__ vcmpequb(kScratchSimd128Reg, i.InputSimd128Register(0), __ vcmpgtsb(kScratchSimd128Reg, i.InputSimd128Register(1),
i.InputSimd128Register(1)); i.InputSimd128Register(0));
__ vcmpgtsb(i.OutputSimd128Register(), i.InputSimd128Register(0), __ vnor(i.OutputSimd128Register(), kScratchSimd128Reg,
i.InputSimd128Register(1)); kScratchSimd128Reg);
__ vor(i.OutputSimd128Register(), i.OutputSimd128Register(),
kScratchSimd128Reg);
break; break;
} }
case kPPC_I8x16GtU: { case kPPC_I8x16GtU: {
......
...@@ -2986,12 +2986,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -2986,12 +2986,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kS390_I32x4GeS: { case kS390_I32x4GeS: {
__ vceq(kScratchDoubleReg, i.InputSimd128Register(0), __ vch(kScratchDoubleReg, i.InputSimd128Register(1),
i.InputSimd128Register(1), Condition(0), Condition(2)); i.InputSimd128Register(0), Condition(0), Condition(2));
__ vch(i.OutputSimd128Register(), i.InputSimd128Register(0), __ vno(i.OutputSimd128Register(), kScratchDoubleReg, kScratchDoubleReg,
i.InputSimd128Register(1), Condition(0), Condition(2)); Condition(0), Condition(0), Condition(2));
__ vo(i.OutputSimd128Register(), i.OutputSimd128Register(),
kScratchDoubleReg, Condition(0), Condition(0), Condition(2));
break; break;
} }
case kS390_I32x4GtU: { case kS390_I32x4GtU: {
...@@ -3014,12 +3012,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3014,12 +3012,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kS390_I16x8GeS: { case kS390_I16x8GeS: {
__ vceq(kScratchDoubleReg, i.InputSimd128Register(0), __ vch(kScratchDoubleReg, i.InputSimd128Register(1),
i.InputSimd128Register(1), Condition(0), Condition(1)); i.InputSimd128Register(0), Condition(0), Condition(1));
__ vch(i.OutputSimd128Register(), i.InputSimd128Register(0), __ vno(i.OutputSimd128Register(), kScratchDoubleReg, kScratchDoubleReg,
i.InputSimd128Register(1), Condition(0), Condition(1)); Condition(0), Condition(0), Condition(1));
__ vo(i.OutputSimd128Register(), i.OutputSimd128Register(),
kScratchDoubleReg, Condition(0), Condition(0), Condition(1));
break; break;
} }
case kS390_I16x8GtU: { case kS390_I16x8GtU: {
...@@ -3042,12 +3038,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3042,12 +3038,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
} }
case kS390_I8x16GeS: { case kS390_I8x16GeS: {
__ vceq(kScratchDoubleReg, i.InputSimd128Register(0), __ vch(kScratchDoubleReg, i.InputSimd128Register(1),
i.InputSimd128Register(1), Condition(0), Condition(0)); i.InputSimd128Register(0), Condition(0), Condition(0));
__ vch(i.OutputSimd128Register(), i.InputSimd128Register(0), __ vno(i.OutputSimd128Register(), kScratchDoubleReg, kScratchDoubleReg,
i.InputSimd128Register(1), Condition(0), Condition(0)); Condition(0), Condition(0), Condition(0));
__ vo(i.OutputSimd128Register(), i.OutputSimd128Register(),
kScratchDoubleReg, Condition(0), Condition(0), Condition(0));
break; break;
} }
case kS390_I8x16GtU: { case kS390_I8x16GtU: {
......
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