[cleanup] Remove redundant Register logic for constexpr

Register currently has several methods twice: Once for regular
{Register} objects, once for constexpr registers or register codes. It
was implemented this way so that the non-constexpr code can include
DCHECKs.
With C++14, we can add these DCHECKs also in the constexpr methods. Thus
the redundant implementation can be skipped.

R=tebbi@chromium.org

Bug: v8:9810
Change-Id: Ifc6253d4cd04b19be9bca47495186849118ad6b8
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1910958Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64953}

src/builtins/arm/builtins-arm.cc

@@ -2495,7 +2495,7 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     // Save all parameter registers (see wasm-linkage.cc). They might be
     // overwritten in the runtime call below. We don't have any callee-saved
     // registers in wasm, so no need to store anything else.
-    constexpr RegList gp_regs = Register::ListOf<r0, r1, r2, r3>();
+    constexpr RegList gp_regs = Register::ListOf(r0, r1, r2, r3);
     constexpr DwVfpRegister lowest_fp_reg = d0;
     constexpr DwVfpRegister highest_fp_reg = d7;
 

src/builtins/arm64/builtins-arm64.cc

@@ -3036,9 +3036,9 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     // overwritten in the runtime call below. We don't have any callee-saved
     // registers in wasm, so no need to store anything else.
     constexpr RegList gp_regs =
-        Register::ListOf<x0, x1, x2, x3, x4, x5, x6, x7>();
+        Register::ListOf(x0, x1, x2, x3, x4, x5, x6, x7);
     constexpr RegList fp_regs =
-        Register::ListOf<d0, d1, d2, d3, d4, d5, d6, d7>();
+        Register::ListOf(d0, d1, d2, d3, d4, d5, d6, d7);
     __ PushXRegList(gp_regs);
     __ PushDRegList(fp_regs);
 

src/builtins/mips/builtins-mips.cc

@@ -2457,9 +2457,9 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     // Save all parameter registers (see wasm-linkage.cc). They might be
     // overwritten in the runtime call below. We don't have any callee-saved
     // registers in wasm, so no need to store anything else.
-    constexpr RegList gp_regs = Register::ListOf<a0, a1, a2, a3>();
+    constexpr RegList gp_regs = Register::ListOf(a0, a1, a2, a3);
     constexpr RegList fp_regs =
-        DoubleRegister::ListOf<f2, f4, f6, f8, f10, f12, f14>();
+        DoubleRegister::ListOf(f2, f4, f6, f8, f10, f12, f14);
     __ MultiPush(gp_regs);
     __ MultiPushFPU(fp_regs);
 

src/builtins/mips64/builtins-mips64.cc

@@ -2495,9 +2495,9 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     // overwritten in the runtime call below. We don't have any callee-saved
     // registers in wasm, so no need to store anything else.
     constexpr RegList gp_regs =
-        Register::ListOf<a0, a1, a2, a3, a4, a5, a6, a7>();
+        Register::ListOf(a0, a1, a2, a3, a4, a5, a6, a7);
     constexpr RegList fp_regs =
-        DoubleRegister::ListOf<f2, f4, f6, f8, f10, f12, f14>();
+        DoubleRegister::ListOf(f2, f4, f6, f8, f10, f12, f14);
     __ MultiPush(gp_regs);
     __ MultiPushFPU(fp_regs);
 

src/builtins/ppc/builtins-ppc.cc

@@ -2573,9 +2573,9 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     // overwritten in the runtime call below. We don't have any callee-saved
     // registers in wasm, so no need to store anything else.
     constexpr RegList gp_regs =
-        Register::ListOf<r3, r4, r5, r6, r7, r8, r9, r10>();
+        Register::ListOf(r3, r4, r5, r6, r7, r8, r9, r10);
     constexpr RegList fp_regs =
-        DoubleRegister::ListOf<d1, d2, d3, d4, d5, d6, d7, d8>();
+        DoubleRegister::ListOf(d1, d2, d3, d4, d5, d6, d7, d8);
     __ MultiPush(gp_regs);
     __ MultiPushDoubles(fp_regs);
 

src/builtins/s390/builtins-s390.cc

@@ -2626,11 +2626,11 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     // Save all parameter registers (see wasm-linkage.cc). They might be
     // overwritten in the runtime call below. We don't have any callee-saved
     // registers in wasm, so no need to store anything else.
-    constexpr RegList gp_regs = Register::ListOf<r2, r3, r4, r5, r6>();
+    constexpr RegList gp_regs = Register::ListOf(r2, r3, r4, r5, r6);
 #if V8_TARGET_ARCH_S390X
-    constexpr RegList fp_regs = DoubleRegister::ListOf<d0, d2, d4, d6>();
+    constexpr RegList fp_regs = DoubleRegister::ListOf(d0, d2, d4, d6);
 #else
-    constexpr RegList fp_regs = DoubleRegister::ListOf<d0, d2>();
+    constexpr RegList fp_regs = DoubleRegister::ListOf(d0, d2);
 #endif
     __ MultiPush(gp_regs);
     __ MultiPushDoubles(fp_regs);

src/codegen/arm/register-arm.h

@@ -126,7 +126,7 @@ static_assert(sizeof(Register) == sizeof(int),
 
 // r7: context register
 #define DECLARE_REGISTER(R) \
-  constexpr Register R = Register::from_code<kRegCode_##R>();
+  constexpr Register R = Register::from_code(kRegCode_##R);
 GENERAL_REGISTERS(DECLARE_REGISTER)
 #undef DECLARE_REGISTER
 constexpr Register no_reg = Register::no_reg();
@@ -292,24 +292,24 @@ class CRegister : public RegisterBase<CRegister, kCAfterLast> {
 // Support for the VFP registers s0 to s31 (d0 to d15).
 // Note that "s(N):s(N+1)" is the same as "d(N/2)".
 #define DECLARE_FLOAT_REGISTER(R) \
-  constexpr SwVfpRegister R = SwVfpRegister::from_code<kSwVfpCode_##R>();
+  constexpr SwVfpRegister R = SwVfpRegister::from_code(kSwVfpCode_##R);
 FLOAT_REGISTERS(DECLARE_FLOAT_REGISTER)
 #undef DECLARE_FLOAT_REGISTER
 
 #define DECLARE_LOW_DOUBLE_REGISTER(R) \
-  constexpr LowDwVfpRegister R = LowDwVfpRegister::from_code<kDoubleCode_##R>();
+  constexpr LowDwVfpRegister R = LowDwVfpRegister::from_code(kDoubleCode_##R);
 LOW_DOUBLE_REGISTERS(DECLARE_LOW_DOUBLE_REGISTER)
 #undef DECLARE_LOW_DOUBLE_REGISTER
 
 #define DECLARE_DOUBLE_REGISTER(R) \
-  constexpr DwVfpRegister R = DwVfpRegister::from_code<kDoubleCode_##R>();
+  constexpr DwVfpRegister R = DwVfpRegister::from_code(kDoubleCode_##R);
 NON_LOW_DOUBLE_REGISTERS(DECLARE_DOUBLE_REGISTER)
 #undef DECLARE_DOUBLE_REGISTER
 
 constexpr DwVfpRegister no_dreg = DwVfpRegister::no_reg();
 
 #define DECLARE_SIMD128_REGISTER(R) \
-  constexpr Simd128Register R = Simd128Register::from_code<kSimd128Code_##R>();
+  constexpr Simd128Register R = Simd128Register::from_code(kSimd128Code_##R);
 SIMD128_REGISTERS(DECLARE_SIMD128_REGISTER)
 #undef DECLARE_SIMD128_REGISTER
 
@@ -321,7 +321,7 @@ constexpr LowDwVfpRegister kDoubleRegZero = d13;
 constexpr CRegister no_creg = CRegister::no_reg();
 
 #define DECLARE_C_REGISTER(R) \
-  constexpr CRegister R = CRegister::from_code<kCCode_##R>();
+  constexpr CRegister R = CRegister::from_code(kCCode_##R);
 C_REGISTERS(DECLARE_C_REGISTER)
 #undef DECLARE_C_REGISTER
 

src/codegen/ia32/assembler-ia32.cc

@@ -1225,7 +1225,7 @@ void Assembler::sub(Operand dst, Register src) {
 void Assembler::sub_sp_32(uint32_t imm) {
   EnsureSpace ensure_space(this);
   EMIT(0x81);  // using a literal 32-bit immediate.
-  static constexpr Register ireg = Register::from_code<5>();
+  static constexpr Register ireg = Register::from_code(5);
   emit_operand(ireg, Operand(esp));
   emit(imm);
 }
@@ -2932,7 +2932,7 @@ void Assembler::bmi2(SIMDPrefix pp, byte op, Register reg, Register vreg,
 void Assembler::rorx(Register dst, Operand src, byte imm8) {
   DCHECK(IsEnabled(BMI2));
   DCHECK(is_uint8(imm8));
-  Register vreg = Register::from_code<0>();  // VEX.vvvv unused
+  Register vreg = Register::from_code(0);  // VEX.vvvv unused
   EnsureSpace ensure_space(this);
   emit_vex_prefix(vreg, kLZ, kF2, k0F3A, kW0);
   EMIT(0xF0);

src/codegen/ia32/register-ia32.h

@@ -71,7 +71,7 @@ static_assert(sizeof(Register) == sizeof(int),
               "Register can efficiently be passed by value");
 
 #define DEFINE_REGISTER(R) \
-  constexpr Register R = Register::from_code<kRegCode_##R>();
+  constexpr Register R = Register::from_code(kRegCode_##R);
 GENERAL_REGISTERS(DEFINE_REGISTER)
 #undef DEFINE_REGISTER
 constexpr Register no_reg = Register::no_reg();
@@ -99,7 +99,7 @@ using DoubleRegister = XMMRegister;
 using Simd128Register = XMMRegister;
 
 #define DEFINE_REGISTER(R) \
-  constexpr DoubleRegister R = DoubleRegister::from_code<kDoubleCode_##R>();
+  constexpr DoubleRegister R = DoubleRegister::from_code(kDoubleCode_##R);
 DOUBLE_REGISTERS(DEFINE_REGISTER)
 #undef DEFINE_REGISTER
 constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();
@@ -109,10 +109,9 @@ constexpr int kNumRegs = 8;
 
 // Caller-saved registers
 constexpr RegList kJSCallerSaved =
-    Register::ListOf<eax, ecx, edx,
-                     ebx,  // used as a caller-saved register in JavaScript code
-                     edi   // callee function
-                     >();
+    Register::ListOf(eax, ecx, edx,
+                     ebx,   // used as caller-saved register in JavaScript code
+                     edi);  // callee function
 
 constexpr int kNumJSCallerSaved = 5;
 

src/codegen/mips/register-mips.h

@@ -194,7 +194,7 @@ class Register : public RegisterBase<Register, kRegAfterLast> {
 // s3: scratch register
 // s4: scratch register 2
 #define DECLARE_REGISTER(R) \
-  constexpr Register R = Register::from_code<kRegCode_##R>();
+  constexpr Register R = Register::from_code(kRegCode_##R);
 GENERAL_REGISTERS(DECLARE_REGISTER)
 #undef DECLARE_REGISTER
 constexpr Register no_reg = Register::no_reg();
@@ -265,7 +265,7 @@ using FloatRegister = FPURegister;
 using DoubleRegister = FPURegister;
 
 #define DECLARE_DOUBLE_REGISTER(R) \
-  constexpr DoubleRegister R = DoubleRegister::from_code<kDoubleCode_##R>();
+  constexpr DoubleRegister R = DoubleRegister::from_code(kDoubleCode_##R);
 DOUBLE_REGISTERS(DECLARE_DOUBLE_REGISTER)
 #undef DECLARE_DOUBLE_REGISTER
 
@@ -275,7 +275,7 @@ constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();
 using Simd128Register = MSARegister;
 
 #define DECLARE_SIMD128_REGISTER(R) \
-  constexpr Simd128Register R = Simd128Register::from_code<kMsaCode_##R>();
+  constexpr Simd128Register R = Simd128Register::from_code(kMsaCode_##R);
 SIMD128_REGISTERS(DECLARE_SIMD128_REGISTER)
 #undef DECLARE_SIMD128_REGISTER
 

src/codegen/mips64/register-mips64.h

@@ -193,7 +193,7 @@ class Register : public RegisterBase<Register, kRegAfterLast> {
 // s3: scratch register
 // s4: scratch register 2
 #define DECLARE_REGISTER(R) \
-  constexpr Register R = Register::from_code<kRegCode_##R>();
+  constexpr Register R = Register::from_code(kRegCode_##R);
 GENERAL_REGISTERS(DECLARE_REGISTER)
 #undef DECLARE_REGISTER
 
@@ -271,7 +271,7 @@ using FloatRegister = FPURegister;
 using DoubleRegister = FPURegister;
 
 #define DECLARE_DOUBLE_REGISTER(R) \
-  constexpr DoubleRegister R = DoubleRegister::from_code<kDoubleCode_##R>();
+  constexpr DoubleRegister R = DoubleRegister::from_code(kDoubleCode_##R);
 DOUBLE_REGISTERS(DECLARE_DOUBLE_REGISTER)
 #undef DECLARE_DOUBLE_REGISTER
 
@@ -281,7 +281,7 @@ constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();
 using Simd128Register = MSARegister;
 
 #define DECLARE_SIMD128_REGISTER(R) \
-  constexpr Simd128Register R = Simd128Register::from_code<kMsaCode_##R>();
+  constexpr Simd128Register R = Simd128Register::from_code(kMsaCode_##R);
 SIMD128_REGISTERS(DECLARE_SIMD128_REGISTER)
 #undef DECLARE_SIMD128_REGISTER
 

src/codegen/ppc/register-ppc.h

@@ -210,7 +210,7 @@ static_assert(sizeof(Register) == sizeof(int),
               "Register can efficiently be passed by value");
 
 #define DEFINE_REGISTER(R) \
-  constexpr Register R = Register::from_code<kRegCode_##R>();
+  constexpr Register R = Register::from_code(kRegCode_##R);
 GENERAL_REGISTERS(DEFINE_REGISTER)
 #undef DEFINE_REGISTER
 constexpr Register no_reg = Register::no_reg();
@@ -256,7 +256,7 @@ using FloatRegister = DoubleRegister;
 using Simd128Register = DoubleRegister;
 
 #define DEFINE_REGISTER(R) \
-  constexpr DoubleRegister R = DoubleRegister::from_code<kDoubleCode_##R>();
+  constexpr DoubleRegister R = DoubleRegister::from_code(kDoubleCode_##R);
 DOUBLE_REGISTERS(DEFINE_REGISTER)
 #undef DEFINE_REGISTER
 constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();
@@ -283,7 +283,7 @@ class CRegister : public RegisterBase<CRegister, kCAfterLast> {
 
 constexpr CRegister no_creg = CRegister::no_reg();
 #define DECLARE_C_REGISTER(R) \
-  constexpr CRegister R = CRegister::from_code<kCCode_##R>();
+  constexpr CRegister R = CRegister::from_code(kCCode_##R);
 C_REGISTERS(DECLARE_C_REGISTER)
 #undef DECLARE_C_REGISTER
 

src/codegen/register.h

@@ -25,70 +25,37 @@ namespace internal {
 // and best performance in optimized code.
 template <typename SubType, int kAfterLastRegister>
 class RegisterBase {
-  // Internal enum class; used for calling constexpr methods, where we need to
-  // pass an integral type as template parameter.
-  enum class RegisterCode : int { kFirst = 0, kAfterLast = kAfterLastRegister };
-
  public:
   static constexpr int kCode_no_reg = -1;
   static constexpr int kNumRegisters = kAfterLastRegister;
 
   static constexpr SubType no_reg() { return SubType{kCode_no_reg}; }
 
-  template <int code>
-  static constexpr SubType from_code() {
-    static_assert(code >= 0 && code < kNumRegisters, "must be valid reg code");
-    return SubType{code};
-  }
-
-  constexpr operator RegisterCode() const {
-    return static_cast<RegisterCode>(reg_code_);
-  }
-
-  template <RegisterCode reg_code>
-  static constexpr int code() {
-    static_assert(
-        reg_code >= RegisterCode::kFirst && reg_code < RegisterCode::kAfterLast,
-        "must be valid reg");
-    return static_cast<int>(reg_code);
-  }
-
-  template <RegisterCode reg_code>
-  static constexpr int is_valid() {
-    return static_cast<int>(reg_code) != kCode_no_reg;
-  }
-
-  template <RegisterCode reg_code>
-  static constexpr RegList bit() {
-    return is_valid<reg_code>() ? RegList{1} << code<reg_code>() : RegList{};
-  }
-
-  static SubType from_code(int code) {
+  static constexpr SubType from_code(int code) {
+#if V8_HAS_CXX14_CONSTEXPR
     DCHECK_LE(0, code);
     DCHECK_GT(kNumRegisters, code);
+#endif
     return SubType{code};
   }
 
-  // Constexpr version (pass registers as template parameters).
-  template <RegisterCode... reg_codes>
-  static constexpr RegList ListOf() {
-    return CombineRegLists(RegisterBase::bit<reg_codes>()...);
-  }
-
-  // Non-constexpr version (pass registers as method parameters).
   template <typename... Register>
-  static RegList ListOf(Register... regs) {
+  static constexpr RegList ListOf(Register... regs) {
     return CombineRegLists(regs.bit()...);
   }
 
   constexpr bool is_valid() const { return reg_code_ != kCode_no_reg; }
 
-  int code() const {
+  constexpr int code() const {
+#if V8_HAS_CXX14_CONSTEXPR
     DCHECK(is_valid());
+#endif
     return reg_code_;
   }
 
-  RegList bit() const { return is_valid() ? RegList{1} << code() : RegList{}; }
+  constexpr RegList bit() const {
+    return is_valid() ? RegList{1} << code() : RegList{};
+  }
 
   inline constexpr bool operator==(SubType other) const {
     return reg_code_ == other.reg_code_;

src/codegen/s390/register-s390.h

@@ -170,7 +170,7 @@ static_assert(sizeof(Register) == sizeof(int),
               "Register can efficiently be passed by value");
 
 #define DEFINE_REGISTER(R) \
-  constexpr Register R = Register::from_code<kRegCode_##R>();
+  constexpr Register R = Register::from_code(kRegCode_##R);
 GENERAL_REGISTERS(DEFINE_REGISTER)
 #undef DEFINE_REGISTER
 constexpr Register no_reg = Register::no_reg();
@@ -216,7 +216,7 @@ using FloatRegister = DoubleRegister;
 using Simd128Register = DoubleRegister;
 
 #define DEFINE_REGISTER(R) \
-  constexpr DoubleRegister R = DoubleRegister::from_code<kDoubleCode_##R>();
+  constexpr DoubleRegister R = DoubleRegister::from_code(kDoubleCode_##R);
 DOUBLE_REGISTERS(DEFINE_REGISTER)
 #undef DEFINE_REGISTER
 constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();
@@ -241,7 +241,7 @@ class CRegister : public RegisterBase<CRegister, kCAfterLast> {
 
 constexpr CRegister no_creg = CRegister::no_reg();
 #define DECLARE_C_REGISTER(R) \
-  constexpr CRegister R = CRegister::from_code<kCCode_##R>();
+  constexpr CRegister R = CRegister::from_code(kCCode_##R);
 C_REGISTERS(DECLARE_C_REGISTER)
 #undef DECLARE_C_REGISTER
 

src/codegen/x64/assembler-x64.cc

@@ -3944,7 +3944,7 @@ void Assembler::bmi2l(SIMDPrefix pp, byte op, Register reg, Register vreg,
 void Assembler::rorxq(Register dst, Register src, byte imm8) {
   DCHECK(IsEnabled(BMI2));
   DCHECK(is_uint8(imm8));
-  Register vreg = Register::from_code<0>();  // VEX.vvvv unused
+  Register vreg = Register::from_code(0);  // VEX.vvvv unused
   EnsureSpace ensure_space(this);
   emit_vex_prefix(dst, vreg, src, kLZ, kF2, k0F3A, kW1);
   emit(0xF0);
@@ -3955,7 +3955,7 @@ void Assembler::rorxq(Register dst, Register src, byte imm8) {
 void Assembler::rorxq(Register dst, Operand src, byte imm8) {
   DCHECK(IsEnabled(BMI2));
   DCHECK(is_uint8(imm8));
-  Register vreg = Register::from_code<0>();  // VEX.vvvv unused
+  Register vreg = Register::from_code(0);  // VEX.vvvv unused
   EnsureSpace ensure_space(this);
   emit_vex_prefix(dst, vreg, src, kLZ, kF2, k0F3A, kW1);
   emit(0xF0);
@@ -3966,7 +3966,7 @@ void Assembler::rorxq(Register dst, Operand src, byte imm8) {
 void Assembler::rorxl(Register dst, Register src, byte imm8) {
   DCHECK(IsEnabled(BMI2));
   DCHECK(is_uint8(imm8));
-  Register vreg = Register::from_code<0>();  // VEX.vvvv unused
+  Register vreg = Register::from_code(0);  // VEX.vvvv unused
   EnsureSpace ensure_space(this);
   emit_vex_prefix(dst, vreg, src, kLZ, kF2, k0F3A, kW0);
   emit(0xF0);
@@ -3977,7 +3977,7 @@ void Assembler::rorxl(Register dst, Register src, byte imm8) {
 void Assembler::rorxl(Register dst, Operand src, byte imm8) {
   DCHECK(IsEnabled(BMI2));
   DCHECK(is_uint8(imm8));
-  Register vreg = Register::from_code<0>();  // VEX.vvvv unused
+  Register vreg = Register::from_code(0);  // VEX.vvvv unused
   EnsureSpace ensure_space(this);
   emit_vex_prefix(dst, vreg, src, kLZ, kF2, k0F3A, kW0);
   emit(0xF0);

src/codegen/x64/register-x64.h

@@ -70,7 +70,7 @@ static_assert(sizeof(Register) == sizeof(int),
               "Register can efficiently be passed by value");
 
 #define DECLARE_REGISTER(R) \
-  constexpr Register R = Register::from_code<kRegCode_##R>();
+  constexpr Register R = Register::from_code(kRegCode_##R);
 GENERAL_REGISTERS(DECLARE_REGISTER)
 #undef DECLARE_REGISTER
 constexpr Register no_reg = Register::no_reg();
@@ -78,10 +78,9 @@ constexpr Register no_reg = Register::no_reg();
 constexpr int kNumRegs = 16;
 
 constexpr RegList kJSCallerSaved =
-    Register::ListOf<rax, rcx, rdx,
+    Register::ListOf(rax, rcx, rdx,
                      rbx,  // used as a caller-saved register in JavaScript code
-                     rdi   // callee function
-                     >();
+                     rdi);  // callee function
 
 constexpr int kNumJSCallerSaved = 5;
 
@@ -176,7 +175,7 @@ using DoubleRegister = XMMRegister;
 using Simd128Register = XMMRegister;
 
 #define DECLARE_REGISTER(R) \
-  constexpr DoubleRegister R = DoubleRegister::from_code<kDoubleCode_##R>();
+  constexpr DoubleRegister R = DoubleRegister::from_code(kDoubleCode_##R);
 DOUBLE_REGISTERS(DECLARE_REGISTER)
 #undef DECLARE_REGISTER
 constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();

src/wasm/baseline/ia32/liftoff-assembler-ia32.h

@@ -45,7 +45,7 @@ inline MemOperand GetHalfStackSlot(uint32_t index, RegPairHalf half) {
 inline Operand GetInstanceOperand() { return Operand(ebp, -8); }
 
 static constexpr LiftoffRegList kByteRegs =
-    LiftoffRegList::FromBits<Register::ListOf<eax, ecx, edx>()>();
+    LiftoffRegList::FromBits<Register::ListOf(eax, ecx, edx)>();
 
 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base,
                  int32_t offset, ValueType type) {

src/wasm/baseline/liftoff-assembler-defs.h

@@ -15,63 +15,58 @@ namespace wasm {
 #if V8_TARGET_ARCH_IA32
 
 constexpr RegList kLiftoffAssemblerGpCacheRegs =
-    Register::ListOf<eax, ecx, edx, esi, edi>();
+    Register::ListOf(eax, ecx, edx, esi, edi);
 
 // Omit xmm7, which is the kScratchDoubleReg.
 constexpr RegList kLiftoffAssemblerFpCacheRegs =
-    DoubleRegister::ListOf<xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6>();
+    DoubleRegister::ListOf(xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6);
 
 #elif V8_TARGET_ARCH_X64
 
 constexpr RegList kLiftoffAssemblerGpCacheRegs =
-    Register::ListOf<rax, rcx, rdx, rbx, rsi, rdi, r9>();
+    Register::ListOf(rax, rcx, rdx, rbx, rsi, rdi, r9);
 
 constexpr RegList kLiftoffAssemblerFpCacheRegs =
-    DoubleRegister::ListOf<xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7>();
+    DoubleRegister::ListOf(xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7);
 
 #elif V8_TARGET_ARCH_MIPS
 
 constexpr RegList kLiftoffAssemblerGpCacheRegs =
-    Register::ListOf<a0, a1, a2, a3, t0, t1, t2, t3, t4, t5, t6, s7, v0, v1>();
+    Register::ListOf(a0, a1, a2, a3, t0, t1, t2, t3, t4, t5, t6, s7, v0, v1);
 
-constexpr RegList kLiftoffAssemblerFpCacheRegs =
-    DoubleRegister::ListOf<f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, f20,
-                           f22, f24>();
+constexpr RegList kLiftoffAssemblerFpCacheRegs = DoubleRegister::ListOf(
+    f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, f20, f22, f24);
 
 #elif V8_TARGET_ARCH_MIPS64
 
 constexpr RegList kLiftoffAssemblerGpCacheRegs =
-    Register::ListOf<a0, a1, a2, a3, a4, a5, a6, a7, t0, t1, t2, s7, v0, v1>();
+    Register::ListOf(a0, a1, a2, a3, a4, a5, a6, a7, t0, t1, t2, s7, v0, v1);
 
-constexpr RegList kLiftoffAssemblerFpCacheRegs =
-    DoubleRegister::ListOf<f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, f20,
-                           f22, f24, f26>();
+constexpr RegList kLiftoffAssemblerFpCacheRegs = DoubleRegister::ListOf(
+    f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, f20, f22, f24, f26);
 
 #elif V8_TARGET_ARCH_ARM
 
 // r7: cp, r10: root, r11: fp, r12: ip, r13: sp, r14: lr, r15: pc.
 constexpr RegList kLiftoffAssemblerGpCacheRegs =
-    Register::ListOf<r0, r1, r2, r3, r4, r5, r6, r8, r9>();
+    Register::ListOf(r0, r1, r2, r3, r4, r5, r6, r8, r9);
 
 // d13: zero, d14-d15: scratch
-constexpr RegList kLiftoffAssemblerFpCacheRegs =
-    LowDwVfpRegister::ListOf<d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11,
-                             d12>();
+constexpr RegList kLiftoffAssemblerFpCacheRegs = LowDwVfpRegister::ListOf(
+    d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12);
 
 #elif V8_TARGET_ARCH_ARM64
 
 // x16: ip0, x17: ip1, x18: platform register, x26: root, x27: cp, x29: fp,
 // x30: lr, x31: xzr.
 constexpr RegList kLiftoffAssemblerGpCacheRegs =
-    CPURegister::ListOf<x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12,
-                        x13, x14, x15, x19, x20, x21, x22, x23, x24, x25,
-                        x28>();
+    CPURegister::ListOf(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12,
+                        x13, x14, x15, x19, x20, x21, x22, x23, x24, x25, x28);
 
 // d15: fp_zero, d30-d31: macro-assembler scratch V Registers.
-constexpr RegList kLiftoffAssemblerFpCacheRegs =
-    CPURegister::ListOf<d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12,
-                        d13, d14, d16, d17, d18, d19, d20, d21, d22, d23, d24,
-                        d25, d26, d27, d28, d29>();
+constexpr RegList kLiftoffAssemblerFpCacheRegs = CPURegister::ListOf(
+    d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12, d13, d14, d16, d17,
+    d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29);
 
 #else
 

src/wasm/baseline/liftoff-compiler.cc

@@ -1792,7 +1792,7 @@ class LiftoffCompiler {
     __ SpillAllRegisters();
 
     constexpr Register kGpReturnReg = kGpReturnRegisters[0];
-    static_assert(kLiftoffAssemblerGpCacheRegs & Register::bit<kGpReturnReg>(),
+    static_assert(kLiftoffAssemblerGpCacheRegs & kGpReturnReg.bit(),
                   "first return register is a cache register (needs more "
                   "complex code here otherwise)");
     LiftoffRegister result = pinned.set(LiftoffRegister(kGpReturnReg));

src/wasm/baseline/x64/liftoff-assembler-x64.h

@@ -26,15 +26,15 @@ namespace liftoff {
 constexpr Register kScratchRegister2 = r11;
 static_assert(kScratchRegister != kScratchRegister2, "collision");
 static_assert((kLiftoffAssemblerGpCacheRegs &
-               Register::ListOf<kScratchRegister, kScratchRegister2>()) == 0,
+               Register::ListOf(kScratchRegister, kScratchRegister2)) == 0,
               "scratch registers must not be used as cache registers");
 
 constexpr DoubleRegister kScratchDoubleReg2 = xmm14;
 static_assert(kScratchDoubleReg != kScratchDoubleReg2, "collision");
-static_assert(
-    (kLiftoffAssemblerFpCacheRegs &
-     DoubleRegister::ListOf<kScratchDoubleReg, kScratchDoubleReg2>()) == 0,
-    "scratch registers must not be used as cache registers");
+static_assert((kLiftoffAssemblerFpCacheRegs &
+               DoubleRegister::ListOf(kScratchDoubleReg, kScratchDoubleReg2)) ==
+                  0,
+              "scratch registers must not be used as cache registers");
 
 // rbp-8 holds the stack marker, rbp-16 is the instance parameter, first stack
 // slot is located at rbp-24.