[riscv64] fix PushAllRegistersAndIterateStack

1. add saving for s9, s10, s11
2. remove saving for gp.
3. fix maintain of fp (which alias to s0).

Reference of calling convention source:
https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf.

Change-Id: I7898f52e55df3976dccd736b72249f4fe28dd359
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2848476Reviewed-by: Michael Lippautz <mlippautz@chromium.org>
Commit-Queue: Michael Lippautz <mlippautz@chromium.org>
Auto-Submit: Ji Qiu <qiuji@iscas.ac.cn>
Cr-Commit-Position: refs/heads/master@{#74208}

src/heap/base/asm/riscv64/push_registers_asm.cc

@@ -5,21 +5,26 @@
 // Push all callee-saved registers to get them on the stack for conservative
 // stack scanning.
 //
-// See asm/x64/push_registers_clang.cc for why the function is not generated
+// See asm/x64/push_registers_asm.cc for why the function is not generated
 // using clang.
 //
-// Do not depend on V8_TARGET_OS_* defines as some embedders may override the
-// GN toolchain (e.g. ChromeOS) and not provide them.
+// Calling convention source:
+// https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf Table 18.2
 asm(".global PushAllRegistersAndIterateStack             \n"
     ".type PushAllRegistersAndIterateStack, %function    \n"
     ".hidden PushAllRegistersAndIterateStack             \n"
     "PushAllRegistersAndIterateStack:                    \n"
     // Push all callee-saved registers and save return address.
-    "  addi sp, sp, -96                                  \n"
-    "  sd ra, 88(sp)                                     \n"
-    "  sd s8, 80(sp)                                     \n"
-    "  sd sp, 72(sp)                                     \n"
-    "  sd gp, 64(sp)                                     \n"
+    "  addi sp, sp, -112                                 \n"
+    // Save return address.
+    "  sd ra, 104(sp)                                    \n"
+    // sp is callee-saved.
+    "  sd sp, 96(sp)                                     \n"
+    // s0-s11 are callee-saved.
+    "  sd s11, 88(sp)                                    \n"
+    "  sd s10, 80(sp)                                    \n"
+    "  sd s9, 72(sp)                                     \n"
+    "  sd s8, 64(sp)                                     \n"
     "  sd s7, 56(sp)                                     \n"
     "  sd s6, 48(sp)                                     \n"
     "  sd s5, 40(sp)                                     \n"
@@ -28,18 +33,19 @@ asm(".global PushAllRegistersAndIterateStack             \n"
     "  sd s2, 16(sp)                                     \n"
     "  sd s1,  8(sp)                                     \n"
     "  sd s0,  0(sp)                                     \n"
-    // Maintain frame pointer.
-    "  mv s8, sp                                         \n"
+    // Maintain frame pointer(fp is s0).
+    "  mv s0, sp                                         \n"
     // Pass 1st parameter (a0) unchanged (Stack*).
     // Pass 2nd parameter (a1) unchanged (StackVisitor*).
-    // Save 3rd parameter (a2; IterateStackCallback).
+    // Save 3rd parameter (a2; IterateStackCallback) to a3.
     "  mv a3, a2                                         \n"
+    // Pass 3rd parameter as sp (stack pointer).
     "  mv a2, sp                                         \n"
     // Call the callback.
     "  jalr a3                                           \n"
     // Load return address.
-    "  ld ra, 88(sp)                                     \n"
+    "  ld ra, 104(sp)                                    \n"
     // Restore frame pointer.
-    "  ld s8, 80(sp)                                     \n"
-    "  addi sp, sp, 96                                   \n"
+    "  ld s0, 0(sp)                                      \n"
+    "  addi sp, sp, 112                                  \n"
     "  jr ra                                             \n");