[ia32] Fix register order on shrd

The {shrd} instruction was implemented with switched {src} and {dst}
registers. The only users ({ShrPair} and {SarPair}) "fixed" this by
passing switched registers again.

This CL cleans this up, and adds some DCHECKs that are required for the
logic in the pair-wise shifts to work correctly.
Also, avoid an unneccessary shift by 0 on ia32.

R=jkummerow@chromium.org

Bug: v8:9919
Change-Id: I8ec31526f5adcea68f6f6ef7c8076ac2e5589a5f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1899767Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64779}

src/codegen/arm/macro-assembler-arm.cc

@@ -1188,6 +1188,7 @@ void TurboAssembler::LslPair(Register dst_low, Register dst_high,
 void TurboAssembler::LslPair(Register dst_low, Register dst_high,
                              Register src_low, Register src_high,
                              uint32_t shift) {
+  DCHECK_GE(63, shift);
   DCHECK(!AreAliased(dst_high, src_low));
 
   if (shift == 0) {
@@ -1236,6 +1237,7 @@ void TurboAssembler::LsrPair(Register dst_low, Register dst_high,
 void TurboAssembler::LsrPair(Register dst_low, Register dst_high,
                              Register src_low, Register src_high,
                              uint32_t shift) {
+  DCHECK_GE(63, shift);
   DCHECK(!AreAliased(dst_low, src_high));
 
   if (shift == 32) {
@@ -1283,6 +1285,7 @@ void TurboAssembler::AsrPair(Register dst_low, Register dst_high,
 void TurboAssembler::AsrPair(Register dst_low, Register dst_high,
                              Register src_low, Register src_high,
                              uint32_t shift) {
+  DCHECK_GE(63, shift);
   DCHECK(!AreAliased(dst_low, src_high));
 
   if (shift == 32) {

src/codegen/ia32/assembler-ia32.cc

@@ -1194,7 +1194,7 @@ void Assembler::shrd(Register dst, Register src, uint8_t shift) {
   EnsureSpace ensure_space(this);
   EMIT(0x0F);
   EMIT(0xAC);
-  emit_operand(dst, Operand(src));
+  emit_operand(src, Operand(dst));
   EMIT(shift);
 }
 

src/codegen/ia32/macro-assembler-ia32.cc

@@ -571,9 +571,10 @@ void TurboAssembler::Cvttsd2ui(Register dst, Operand src, XMMRegister tmp) {
 }
 
 void TurboAssembler::ShlPair(Register high, Register low, uint8_t shift) {
+  DCHECK_GE(63, shift);
   if (shift >= 32) {
     mov(high, low);
-    shl(high, shift - 32);
+    if (shift != 32) shl(high, shift - 32);
     xor_(low, low);
   } else {
     shld(high, low, shift);
@@ -593,12 +594,13 @@ void TurboAssembler::ShlPair_cl(Register high, Register low) {
 }
 
 void TurboAssembler::ShrPair(Register high, Register low, uint8_t shift) {
+  DCHECK_GE(63, shift);
   if (shift >= 32) {
     mov(low, high);
-    shr(low, shift - 32);
+    if (shift != 32) shr(low, shift - 32);
     xor_(high, high);
   } else {
-    shrd(high, low, shift);
+    shrd(low, high, shift);
     shr(high, shift);
   }
 }
@@ -615,12 +617,13 @@ void TurboAssembler::ShrPair_cl(Register high, Register low) {
 }
 
 void TurboAssembler::SarPair(Register high, Register low, uint8_t shift) {
+  DCHECK_GE(63, shift);
   if (shift >= 32) {
     mov(low, high);
-    sar(low, shift - 32);
+    if (shift != 32) sar(low, shift - 32);
     sar(high, 31);
   } else {
-    shrd(high, low, shift);
+    shrd(low, high, shift);
     sar(high, shift);
   }
 }