[wasm-simd][liftoff][arm][arm64] Implement load splat

Bug: v8:9909
Change-Id: I620eb89b1ec0387aed1b491f819b52043cbeb5d1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2211225
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68060}

src/wasm/baseline/arm/liftoff-assembler-arm.h

@@ -2146,9 +2146,9 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
   Register actual_src_addr = liftoff::CalculateActualAddress(
       this, &temps, src_addr, offset_reg, offset_imm);
   *protected_load_pc = pc_offset();
+  MachineType memtype = type.mem_type();
 
   if (transform == LoadTransformationKind::kExtend) {
-    MachineType memtype = type.mem_type();
     if (memtype == MachineType::Int8()) {
       vld1(Neon8, NeonListOperand(dst.low_fp()),
            NeonMemOperand(actual_src_addr));
@@ -2176,7 +2176,20 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
     }
   } else {
     DCHECK_EQ(LoadTransformationKind::kSplat, transform);
-    bailout(kSimd, "load splats unimplemented");
+    if (memtype == MachineType::Int8()) {
+      vld1r(Neon8, NeonListOperand(liftoff::GetSimd128Register(dst)),
+            NeonMemOperand(actual_src_addr));
+    } else if (memtype == MachineType::Int16()) {
+      vld1r(Neon16, NeonListOperand(liftoff::GetSimd128Register(dst)),
+            NeonMemOperand(actual_src_addr));
+    } else if (memtype == MachineType::Int32()) {
+      vld1r(Neon32, NeonListOperand(liftoff::GetSimd128Register(dst)),
+            NeonMemOperand(actual_src_addr));
+    } else if (memtype == MachineType::Int64()) {
+      vld1(Neon32, NeonListOperand(dst.low_fp()),
+           NeonMemOperand(actual_src_addr));
+      TurboAssembler::Move(dst.high_fp(), dst.low_fp());
+    }
   }
 }
 

src/wasm/baseline/arm64/liftoff-assembler-arm64.h

@@ -1172,9 +1172,9 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
   MemOperand src_op =
       liftoff::GetMemOp(this, &temps, src_addr, offset_reg, offset_imm);
   *protected_load_pc = pc_offset();
+  MachineType memtype = type.mem_type();
 
   if (transform == LoadTransformationKind::kExtend) {
-    MachineType memtype = type.mem_type();
     if (memtype == MachineType::Int8()) {
       Ldr(dst.fp().D(), src_op);
       Sxtl(dst.fp().V8H(), dst.fp().V8B());
@@ -1195,8 +1195,29 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
       Uxtl(dst.fp().V2D(), dst.fp().V2S());
     }
   } else {
+    // ld1r only allows no offset or post-index, so emit an add.
     DCHECK_EQ(LoadTransformationKind::kSplat, transform);
-    bailout(kSimd, "load splats unimplemented");
+    if (src_op.IsRegisterOffset()) {
+      // We have 2 tmp gps, so it's okay to acquire 1 more here, and actually
+      // doesn't matter if we acquire the same one.
+      Register tmp = temps.AcquireX();
+      Add(tmp, src_op.base(), src_op.regoffset().X());
+      src_op = MemOperand(tmp.X(), 0);
+    } else if (src_op.IsImmediateOffset() && src_op.offset() != 0) {
+      Register tmp = temps.AcquireX();
+      Add(tmp, src_op.base(), src_op.offset());
+      src_op = MemOperand(tmp.X(), 0);
+    }
+
+    if (memtype == MachineType::Int8()) {
+      ld1r(dst.fp().V16B(), src_op);
+    } else if (memtype == MachineType::Int16()) {
+      ld1r(dst.fp().V8H(), src_op);
+    } else if (memtype == MachineType::Int32()) {
+      ld1r(dst.fp().V4S(), src_op);
+    } else if (memtype == MachineType::Int64()) {
+      ld1r(dst.fp().V2D(), src_op);
+    }
   }
 }