Commit 5b4e9103 authored by Liu Yu's avatar Liu Yu Committed by V8 LUCI CQ

[mips] Fix debug build failure

Allow MultiPushMSA and MultiPushMSA to generate simd
instructions in builtins on mips which don't support SIMD;
And implement IsValidFloatParameterRegister on mips.

Change-Id: Iac41930ce4bf39a41dd157e22e4194752df35b8c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2882676
Auto-Submit: Liu yu <liuyu@loongson.cn>
Reviewed-by: 's avatarLeszek Swirski <leszeks@chromium.org>
Reviewed-by: 's avatarZhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Leszek Swirski <leszeks@chromium.org>
Cr-Commit-Position: refs/heads/master@{#74606}
parent 6fdc3fb0
......@@ -2396,7 +2396,11 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
__ Lbu(a1, MemOperand(a1));
__ Branch(&push_doubles, le, a1, Operand(zero_reg));
// Save vector registers.
__ MultiPushMSA(fp_regs);
{
CpuFeatureScope msa_scope(
masm, MIPS_SIMD, CpuFeatureScope::CheckPolicy::kDontCheckSupported);
__ MultiPushMSA(fp_regs);
}
__ Branch(&simd_pushed);
__ bind(&push_doubles);
__ MultiPushFPU(fp_regs);
......@@ -2420,7 +2424,11 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
__ Lbu(a1, MemOperand(a1));
__ Branch(&pop_doubles, le, a1, Operand(zero_reg));
// Pop vector registers.
__ MultiPopMSA(fp_regs);
{
CpuFeatureScope msa_scope(
masm, MIPS_SIMD, CpuFeatureScope::CheckPolicy::kDontCheckSupported);
__ MultiPopMSA(fp_regs);
}
__ Branch(&simd_popped);
__ bind(&pop_doubles);
__ Daddu(sp, sp, base::bits::CountPopulation(fp_regs) * kDoubleSize);
......
......@@ -117,11 +117,13 @@ const char* CallInterfaceDescriptor::DebugName() const {
return "";
}
#if !defined(V8_TARGET_ARCH_MIPS) && !defined(V8_TARGET_ARCH_MIPS64)
bool CallInterfaceDescriptor::IsValidFloatParameterRegister(Register reg) {
#if defined(V8_TARGET_ARCH_MIPS) || defined(V8_TARGET_ARCH_MIPS64)
return reg.code() % 2 == 0;
#else
return true;
}
#endif
}
} // namespace internal
} // namespace v8
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