Commit 5b17a28f authored by Milad Fa's avatar Milad Fa Committed by Commit Bot

PPC/s390: [wasm-simd] Move load/store lane out of post-mvp

Port 848137c4

Original Commit Message:

    Define a new macro list, since this has 1 immediate operand (lane index)
    compared to other SIMD load/stores.

    Also remove all the ifdef guards.

R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N

Bug: v8:10975
Change-Id: I5eb08035c178808fb5033d001e0800956105c8f1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2654186Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#72381}
parent ca0c1f8f
......@@ -2529,6 +2529,28 @@ void InstructionSelector::EmitPrepareResults(
}
}
void InstructionSelector::VisitLoadLane(Node* node) {
LoadLaneParameters params = LoadLaneParametersOf(node->op());
InstructionCode opcode = kArchNop;
if (params.rep == MachineType::Int8()) {
opcode = kPPC_S128Load8Lane;
} else if (params.rep == MachineType::Int16()) {
opcode = kPPC_S128Load16Lane;
} else if (params.rep == MachineType::Int32()) {
opcode = kPPC_S128Load32Lane;
} else if (params.rep == MachineType::Int64()) {
opcode = kPPC_S128Load64Lane;
} else {
UNREACHABLE();
}
PPCOperandGenerator g(this);
Emit(opcode | AddressingModeField::encode(kMode_MRR),
g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(2)),
g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)),
g.UseImmediate(params.laneidx));
}
void InstructionSelector::VisitLoadTransform(Node* node) {
LoadTransformParameters params = LoadTransformParametersOf(node->op());
PPCOperandGenerator g(this);
......@@ -2580,6 +2602,32 @@ void InstructionSelector::VisitLoadTransform(Node* node) {
g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
}
void InstructionSelector::VisitStoreLane(Node* node) {
PPCOperandGenerator g(this);
StoreLaneParameters params = StoreLaneParametersOf(node->op());
InstructionCode opcode = kArchNop;
if (params.rep == MachineRepresentation::kWord8) {
opcode = kPPC_S128Store8Lane;
} else if (params.rep == MachineRepresentation::kWord16) {
opcode = kPPC_S128Store16Lane;
} else if (params.rep == MachineRepresentation::kWord32) {
opcode = kPPC_S128Store32Lane;
} else if (params.rep == MachineRepresentation::kWord64) {
opcode = kPPC_S128Store64Lane;
} else {
UNREACHABLE();
}
InstructionOperand inputs[4];
InstructionOperand value_operand = g.UseRegister(node->InputAt(2));
inputs[0] = value_operand;
inputs[1] = g.UseRegister(node->InputAt(0));
inputs[2] = g.UseRegister(node->InputAt(1));
inputs[3] = g.UseImmediate(params.laneidx);
Emit(opcode | AddressingModeField::encode(kMode_MRR), 0, nullptr, 4, inputs);
}
// static
MachineOperatorBuilder::Flags
InstructionSelector::SupportedMachineOperatorFlags() {
......
......@@ -2798,11 +2798,21 @@ void InstructionSelector::EmitPrepareResults(
}
}
void InstructionSelector::VisitLoadLane(Node* node) {
// We should never reach here, see http://crrev.com/c/2577820
UNIMPLEMENTED();
}
void InstructionSelector::VisitLoadTransform(Node* node) {
// We should never reach here, see http://crrev.com/c/2050811
UNREACHABLE();
}
void InstructionSelector::VisitStoreLane(Node* node) {
// We should never reach here, see http://crrev.com/c/2577820
UNIMPLEMENTED();
}
void InstructionSelector::VisitTruncateFloat32ToInt32(Node* node) {
S390OperandGenerator g(this);
......
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