X87: [x64][ia32] Add Support for the Float64Neg and Float32Neg turbofan operators.

  port f68059b7 (r38383)

  original commit message:
  Benedikt, do you think we could also provide these operators on mips,
  maybe by expanding them to "-0.0 -x"? If mips can provide these operators,
  then we could make Float64Neg and Float32Neg real operators and not just
  OptionalOperators.

BUG=

Review-Url: https://codereview.chromium.org/2223793002
Cr-Commit-Position: refs/heads/master@{#38464}

src/compiler/x87/code-generator-x87.cc

@@ -1179,6 +1179,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ lea(esp, Operand(esp, kFloatSize));
       break;
     }
+    case kX87Float32Neg: {
+      if (FLAG_debug_code && FLAG_enable_slow_asserts) {
+        __ VerifyX87StackDepth(1);
+      }
+      __ fstp(0);
+      __ fld_s(MemOperand(esp, 0));
+      __ fchs();
+      __ lea(esp, Operand(esp, kFloatSize));
+      break;
+    }
     case kX87Float32Round: {
       RoundingMode mode =
           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
@@ -1353,6 +1363,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ lea(esp, Operand(esp, kDoubleSize));
       break;
     }
+    case kX87Float64Neg: {
+      if (FLAG_debug_code && FLAG_enable_slow_asserts) {
+        __ VerifyX87StackDepth(1);
+      }
+      __ fstp(0);
+      __ fld_d(MemOperand(esp, 0));
+      __ fchs();
+      __ lea(esp, Operand(esp, kDoubleSize));
+      break;
+    }
     case kX87Int32ToFloat32: {
       InstructionOperand* input = instr->InputAt(0);
       DCHECK(input->IsRegister() || input->IsStackSlot());

src/compiler/x87/instruction-codes-x87.h

@@ -50,6 +50,7 @@ namespace compiler {
   V(X87Float32Mul)                 \
   V(X87Float32Div)                 \
   V(X87Float32Abs)                 \
+  V(X87Float32Neg)                 \
   V(X87Float32Sqrt)                \
   V(X87Float32Round)               \
   V(X87LoadFloat64Constant)        \
@@ -61,6 +62,7 @@ namespace compiler {
   V(X87Float64Max)                 \
   V(X87Float64Min)                 \
   V(X87Float64Abs)                 \
+  V(X87Float64Neg)                 \
   V(X87Int32ToFloat32)             \
   V(X87Uint32ToFloat32)            \
   V(X87Int32ToFloat64)             \

src/compiler/x87/instruction-selector-x87.cc

@@ -1083,9 +1083,17 @@ void InstructionSelector::VisitFloat64RoundTiesEven(Node* node) {
        g.UseFixed(node, stX_0), g.Use(node->InputAt(0)));
 }
 
-void InstructionSelector::VisitFloat32Neg(Node* node) { UNREACHABLE(); }
+void InstructionSelector::VisitFloat32Neg(Node* node) {
+  X87OperandGenerator g(this);
+  Emit(kX87PushFloat32, g.NoOutput(), g.Use(node->InputAt(0)));
+  Emit(kX87Float32Neg, g.DefineAsFixed(node, stX_0), 0, nullptr);
+}
 
-void InstructionSelector::VisitFloat64Neg(Node* node) { UNREACHABLE(); }
+void InstructionSelector::VisitFloat64Neg(Node* node) {
+  X87OperandGenerator g(this);
+  Emit(kX87PushFloat64, g.NoOutput(), g.Use(node->InputAt(0)));
+  Emit(kX87Float64Neg, g.DefineAsFixed(node, stX_0), 0, nullptr);
+}
 
 void InstructionSelector::VisitFloat64Ieee754Binop(Node* node,
                                                    InstructionCode opcode) {
@@ -1715,7 +1723,8 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
 MachineOperatorBuilder::Flags
 InstructionSelector::SupportedMachineOperatorFlags() {
   MachineOperatorBuilder::Flags flags =
-      MachineOperatorBuilder::kWord32ShiftIsSafe;
+      MachineOperatorBuilder::kWord32ShiftIsSafe |
+      MachineOperatorBuilder::kFloat32Neg | MachineOperatorBuilder::kFloat64Neg;
   if (CpuFeatures::IsSupported(POPCNT)) {
     flags |= MachineOperatorBuilder::kWord32Popcnt;
   }