Commit 59cd199d authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ

PPC/s390: [wasm-relaxed-simd] Add liftoff min/max operations on Arm and Arm64

Port 0236d7b5

Original Commit Message:

    Instruction lowering on ARM uses pmin/pmax as there is no hardware support.
    More details here: https://github.com/WebAssembly/relaxed-simd/issues/33

R=gdeepti@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N

Change-Id: Ifbee1c0485ae47939fc070121ed6e0abd01c3547
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3654562Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#80647}
parent 86656444
......@@ -1879,6 +1879,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "pmax unimplemented");
}
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "f64x2.convert_low_i32x4_s");
......@@ -1981,6 +1993,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kUnsupportedArchitecture, "emit_f32x4max");
}
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_f32x4_relaxed_min");
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_f32x4_relaxed_max");
}
void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "pmin unimplemented");
......
......@@ -2738,6 +2738,30 @@ void LiftoffAssembler::emit_s128_relaxed_laneselect(LiftoffRegister dst,
bailout(kSimd, "emit_s128_relaxed_laneselect");
}
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_f64x2_relaxed_max");
}
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_f32x4_relaxed_min");
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_f32x4_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) {
F64x2ConvertLowI32x4S(dst.fp(), src.fp());
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment