Commit 59b9ff3f authored by jyan's avatar jyan Committed by Commit bot

S390X: Prevent upper 32bit corruption in 32bit ops

Fix A couple places which could cause upper 32bit corruption

R=joransiu@ca.ibm.com, mbrandy@us.ibm.com, michael_dawson@ca.ibm.com
BUG=

Review-Url: https://codereview.chromium.org/1939763003
Cr-Commit-Position: refs/heads/master@{#35952}
parent 1c94bed6
......@@ -808,7 +808,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break;
case kS390_ShiftLeft32:
if (HasRegisterInput(instr, 1)) {
if (i.OutputRegister().is(i.InputRegister(1))) {
if (i.OutputRegister().is(i.InputRegister(1)) &&
!CpuFeatures::IsSupported(DISTINCT_OPS)) {
__ LoadRR(kScratchReg, i.InputRegister(1));
__ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg);
} else {
......@@ -817,9 +818,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
} else {
ASSEMBLE_BINOP(ShiftLeft, ShiftLeft);
}
#if V8_TARGET_ARCH_S390X
__ lgfr(i.OutputRegister(0), i.OutputRegister(0));
#endif
__ LoadlW(i.OutputRegister(0), i.OutputRegister(0));
break;
#if V8_TARGET_ARCH_S390X
case kS390_ShiftLeft64:
......@@ -828,7 +827,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
#endif
case kS390_ShiftRight32:
if (HasRegisterInput(instr, 1)) {
if (i.OutputRegister().is(i.InputRegister(1))) {
if (i.OutputRegister().is(i.InputRegister(1)) &&
!CpuFeatures::IsSupported(DISTINCT_OPS)) {
__ LoadRR(kScratchReg, i.InputRegister(1));
__ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg);
} else {
......@@ -837,9 +837,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
} else {
ASSEMBLE_BINOP(ShiftRight, ShiftRight);
}
#if V8_TARGET_ARCH_S390X
__ lgfr(i.OutputRegister(0), i.OutputRegister(0));
#endif
__ LoadlW(i.OutputRegister(0), i.OutputRegister(0));
break;
#if V8_TARGET_ARCH_S390X
case kS390_ShiftRight64:
......@@ -848,7 +846,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
#endif
case kS390_ShiftRightArith32:
if (HasRegisterInput(instr, 1)) {
if (i.OutputRegister().is(i.InputRegister(1))) {
if (i.OutputRegister().is(i.InputRegister(1)) &&
!CpuFeatures::IsSupported(DISTINCT_OPS)) {
__ LoadRR(kScratchReg, i.InputRegister(1));
__ ShiftRightArith(i.OutputRegister(), i.InputRegister(0),
kScratchReg);
......@@ -858,6 +857,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
} else {
ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith);
}
__ LoadlW(i.OutputRegister(), i.OutputRegister());
break;
#if V8_TARGET_ARCH_S390X
case kS390_ShiftRightArith64:
......@@ -1093,12 +1093,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kS390_MulHigh32:
__ LoadRR(r1, i.InputRegister(0));
__ mr_z(r0, i.InputRegister(1));
__ LoadRR(i.OutputRegister(), r0);
__ LoadW(i.OutputRegister(), r0);
break;
case kS390_MulHighU32:
__ LoadRR(r1, i.InputRegister(0));
__ mlr(r0, i.InputRegister(1));
__ LoadRR(i.OutputRegister(), r0);
__ LoadlW(i.OutputRegister(), r0);
break;
case kS390_MulFloat:
// Ensure we don't clobber right
......@@ -1131,7 +1131,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ LoadRR(r0, i.InputRegister(0));
__ srda(r0, Operand(32));
__ dr(r0, i.InputRegister(1));
__ ltr(i.OutputRegister(), r1);
__ LoadAndTestP_ExtendSrc(i.OutputRegister(),
r1); // Copy R1: Quotient to output
break;
#if V8_TARGET_ARCH_S390X
case kS390_DivU64:
......@@ -1145,7 +1146,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ LoadRR(r0, i.InputRegister(0));
__ srdl(r0, Operand(32));
__ dlr(r0, i.InputRegister(1)); // R0:R1: Dividend
__ ltr(i.OutputRegister(), r1); // Copy R1: Quotient to output
__ LoadlW(i.OutputRegister(), r1); // Copy R1: Quotient to output
__ LoadAndTestP_ExtendSrc(r1, r1);
break;
case kS390_DivFloat:
......@@ -1287,11 +1289,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
} else {
__ AndP(r0, i.InputRegister(0), i.InputImmediate(1));
}
#if V8_TARGET_ARCH_S390X
// TODO(john.yan): use ltgfr here.
__ lgfr(r0, r0);
__ LoadAndTestP(r0, r0);
#endif
__ LoadAndTestP_ExtendSrc(r0, r0);
break;
#if V8_TARGET_ARCH_S390X
case kS390_Tst64:
......
......@@ -1925,7 +1925,7 @@ void MacroAssembler::AllocateTwoByteString(Register result, Register length,
// observing object alignment.
DCHECK((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);
ShiftLeft(scratch1, length, Operand(1)); // Length in bytes, not chars.
ShiftLeftP(scratch1, length, Operand(1)); // Length in bytes, not chars.
AddP(scratch1, Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));
AndP(scratch1, Operand(~kObjectAlignmentMask));
......@@ -4894,6 +4894,15 @@ void MacroAssembler::StoreMultipleW(Register src1, Register src2,
}
}
// Load 32-bits and sign extend if necessary.
void MacroAssembler::LoadW(Register dst, Register src) {
#if V8_TARGET_ARCH_S390X
lgfr(dst, src);
#else
if (!dst.is(src)) lr(dst, src);
#endif
}
// Load 32-bits and sign extend if necessary.
void MacroAssembler::LoadW(Register dst, const MemOperand& mem,
Register scratch) {
......@@ -4920,6 +4929,15 @@ void MacroAssembler::LoadW(Register dst, const MemOperand& mem,
}
}
// Load 32-bits and zero extend if necessary.
void MacroAssembler::LoadlW(Register dst, Register src) {
#if V8_TARGET_ARCH_S390X
llgfr(dst, src);
#else
if (!dst.is(src)) lr(dst, src);
#endif
}
// Variable length depending on whether offset fits into immediate field
// MemOperand of RX or RXY format
void MacroAssembler::LoadlW(Register dst, const MemOperand& mem,
......
......@@ -333,7 +333,9 @@ class MacroAssembler : public Assembler {
void Load(Register dst, const MemOperand& opnd);
void Load(Register dst, const Operand& opnd);
void LoadW(Register dst, const MemOperand& opnd, Register scratch = no_reg);
void LoadW(Register dst, Register src);
void LoadlW(Register dst, const MemOperand& opnd, Register scratch = no_reg);
void LoadlW(Register dst, Register src);
void LoadB(Register dst, const MemOperand& opnd);
void LoadB(Register dst, Register src);
void LoadlB(Register dst, const MemOperand& opnd);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment