Commit 5877551a authored by Pierre Langlois's avatar Pierre Langlois Committed by Commit Bot

[arm64] Expose Printf() to the TurboAssembler.

The `Printf()` macro-assembler method can be very useful as a debugging
tool. However, it's only available to the MacroAssembler making it impossible to
use in jitted code or builtins.

Change-Id: I0c1e6b98d5c6b7fc34990e87d0eb4e37f6322627
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1879287
Commit-Queue: Pierre Langlois <pierre.langlois@arm.com>
Reviewed-by: 's avatarRoss McIlroy <rmcilroy@chromium.org>
Reviewed-by: 's avatarJakob Gruber <jgruber@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64585}
parent 2f9a9673
......@@ -771,7 +771,7 @@ void TurboAssembler::Mrs(const Register& rt, SystemRegister sysreg) {
mrs(rt, sysreg);
}
void MacroAssembler::Msr(SystemRegister sysreg, const Register& rt) {
void TurboAssembler::Msr(SystemRegister sysreg, const Register& rt) {
DCHECK(allow_macro_instructions());
msr(sysreg, rt);
}
......
......@@ -3089,7 +3089,7 @@ void MacroAssembler::LoadNativeContextSlot(int index, Register dst) {
// This is the main Printf implementation. All other Printf variants call
// PrintfNoPreserve after setting up one or more PreserveRegisterScopes.
void MacroAssembler::PrintfNoPreserve(const char* format,
void TurboAssembler::PrintfNoPreserve(const char* format,
const CPURegister& arg0,
const CPURegister& arg1,
const CPURegister& arg2,
......@@ -3122,7 +3122,7 @@ void MacroAssembler::PrintfNoPreserve(const char* format,
fp_tmp_list.Remove(kPCSVarargsFP);
fp_tmp_list.Remove(arg0, arg1, arg2, arg3);
// Override the MacroAssembler's scratch register list. The lists will be
// Override the TurboAssembler's scratch register list. The lists will be
// reset automatically at the end of the UseScratchRegisterScope.
UseScratchRegisterScope temps(this);
TmpList()->set_list(tmp_list.list());
......@@ -3242,7 +3242,7 @@ void TurboAssembler::CallPrintf(int arg_count, const CPURegister* args) {
#endif
}
void MacroAssembler::Printf(const char* format, CPURegister arg0,
void TurboAssembler::Printf(const char* format, CPURegister arg0,
CPURegister arg1, CPURegister arg2,
CPURegister arg3) {
// Printf is expected to preserve all registers, so make sure that none are
......
......@@ -596,6 +596,33 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// Print a message to stderr and abort execution.
void Abort(AbortReason reason);
// Like printf, but print at run-time from generated code.
//
// The caller must ensure that arguments for floating-point placeholders
// (such as %e, %f or %g) are VRegisters, and that arguments for integer
// placeholders are Registers.
//
// Format placeholders that refer to more than one argument, or to a specific
// argument, are not supported. This includes formats like "%1$d" or "%.*d".
//
// This function automatically preserves caller-saved registers so that
// calling code can use Printf at any point without having to worry about
// corruption. The preservation mechanism generates a lot of code. If this is
// a problem, preserve the important registers manually and then call
// PrintfNoPreserve. Callee-saved registers are not used by Printf, and are
// implicitly preserved.
void Printf(const char* format, CPURegister arg0 = NoCPUReg,
CPURegister arg1 = NoCPUReg, CPURegister arg2 = NoCPUReg,
CPURegister arg3 = NoCPUReg);
// Like Printf, but don't preserve any caller-saved registers, not even 'lr'.
//
// The return code from the system printf call will be returned in x0.
void PrintfNoPreserve(const char* format, const CPURegister& arg0 = NoCPUReg,
const CPURegister& arg1 = NoCPUReg,
const CPURegister& arg2 = NoCPUReg,
const CPURegister& arg3 = NoCPUReg);
// Remaining instructions are simple pass-through calls to the assembler.
inline void Asr(const Register& rd, const Register& rn, unsigned shift);
inline void Asr(const Register& rd, const Register& rn, const Register& rm);
......@@ -1194,6 +1221,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
Label* done);
inline void Mrs(const Register& rt, SystemRegister sysreg);
inline void Msr(SystemRegister sysreg, const Register& rt);
// Generates function prologue code.
void Prologue();
......@@ -1430,7 +1458,6 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
inline void Ldnp(const CPURegister& rt, const CPURegister& rt2,
const MemOperand& src);
inline void Movk(const Register& rd, uint64_t imm, int shift = -1);
inline void Msr(SystemRegister sysreg, const Register& rt);
inline void Nop() { nop(); }
void Mvni(const VRegister& vd, const int imm8, Shift shift = LSL,
const int shift_amount = 0) {
......@@ -1920,33 +1947,6 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
void LoadNativeContextSlot(int index, Register dst);
// Like printf, but print at run-time from generated code.
//
// The caller must ensure that arguments for floating-point placeholders
// (such as %e, %f or %g) are VRegisters, and that arguments for integer
// placeholders are Registers.
//
// Format placeholders that refer to more than one argument, or to a specific
// argument, are not supported. This includes formats like "%1$d" or "%.*d".
//
// This function automatically preserves caller-saved registers so that
// calling code can use Printf at any point without having to worry about
// corruption. The preservation mechanism generates a lot of code. If this is
// a problem, preserve the important registers manually and then call
// PrintfNoPreserve. Callee-saved registers are not used by Printf, and are
// implicitly preserved.
void Printf(const char* format, CPURegister arg0 = NoCPUReg,
CPURegister arg1 = NoCPUReg, CPURegister arg2 = NoCPUReg,
CPURegister arg3 = NoCPUReg);
// Like Printf, but don't preserve any caller-saved registers, not even 'lr'.
//
// The return code from the system printf call will be returned in x0.
void PrintfNoPreserve(const char* format, const CPURegister& arg0 = NoCPUReg,
const CPURegister& arg1 = NoCPUReg,
const CPURegister& arg2 = NoCPUReg,
const CPURegister& arg3 = NoCPUReg);
// Far branches resolving.
//
// The various classes of branch instructions with immediate offsets have
......
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