Commit 58640de6 authored by Zhao Jiazhong's avatar Zhao Jiazhong Committed by Commit Bot

[mips][liftoff] Remove lambdas for binops with immediate

Port a1bd7227
https://crrev.com/c/2129631

Original Commit Message:

  This is the same cleanup as in the previous CL, but for {EmitBinOpImm}.
  This requires a minor change in the name of the emit functions with
  immediate, to make them distinguishable from the emit functions with two
  registers. We just append an "i" to the functions with immediate.

Change-Id: I5089097cb74e204002f0dfcfb6ed10d3ade4da0d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2132346Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#66959}
parent be7e5766
......@@ -801,12 +801,12 @@ bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
Register amount) { \
instruction(dst, src, amount); \
}
#define I32_SHIFTOP_I(name, instruction) \
I32_SHIFTOP(name, instruction##v) \
void LiftoffAssembler::emit_i32_##name(Register dst, Register src, \
int amount) { \
DCHECK(is_uint5(amount)); \
instruction(dst, src, amount); \
#define I32_SHIFTOP_I(name, instruction) \
I32_SHIFTOP(name, instruction##v) \
void LiftoffAssembler::emit_i32_##name##i(Register dst, Register src, \
int amount) { \
DCHECK(is_uint5(amount)); \
instruction(dst, src, amount); \
}
I32_SHIFTOP_I(shl, sll)
......
......@@ -695,10 +695,10 @@ I32_BINOP(xor, xor_)
#undef I32_BINOP
#define I32_BINOP_I(name, instruction) \
void LiftoffAssembler::emit_i32_##name(Register dst, Register lhs, \
int32_t imm) { \
instruction(dst, lhs, Operand(imm)); \
#define I32_BINOP_I(name, instruction) \
void LiftoffAssembler::emit_i32_##name##i(Register dst, Register lhs, \
int32_t imm) { \
instruction(dst, lhs, Operand(imm)); \
}
// clang-format off
......@@ -728,12 +728,12 @@ bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
Register amount) { \
instruction(dst, src, amount); \
}
#define I32_SHIFTOP_I(name, instruction) \
I32_SHIFTOP(name, instruction##v) \
void LiftoffAssembler::emit_i32_##name(Register dst, Register src, \
int amount) { \
DCHECK(is_uint5(amount)); \
instruction(dst, src, amount); \
#define I32_SHIFTOP_I(name, instruction) \
I32_SHIFTOP(name, instruction##v) \
void LiftoffAssembler::emit_i32_##name##i(Register dst, Register src, \
int amount) { \
DCHECK(is_uint5(amount)); \
instruction(dst, src, amount); \
}
I32_SHIFTOP_I(shl, sll)
......@@ -808,10 +808,10 @@ I64_BINOP(xor, xor_)
#undef I64_BINOP
#define I64_BINOP_I(name, instruction) \
void LiftoffAssembler::emit_i64_##name(LiftoffRegister dst, \
LiftoffRegister lhs, int32_t imm) { \
instruction(dst.gp(), lhs.gp(), Operand(imm)); \
#define I64_BINOP_I(name, instruction) \
void LiftoffAssembler::emit_i64_##name##i( \
LiftoffRegister dst, LiftoffRegister lhs, int32_t imm) { \
instruction(dst.gp(), lhs.gp(), Operand(imm)); \
}
// clang-format off
......@@ -828,15 +828,15 @@ I64_BINOP_I(xor, Xor)
LiftoffRegister dst, LiftoffRegister src, Register amount) { \
instruction(dst.gp(), src.gp(), amount); \
}
#define I64_SHIFTOP_I(name, instruction) \
I64_SHIFTOP(name, instruction##v) \
void LiftoffAssembler::emit_i64_##name(LiftoffRegister dst, \
LiftoffRegister src, int amount) { \
DCHECK(is_uint6(amount)); \
if (amount < 32) \
instruction(dst.gp(), src.gp(), amount); \
else \
instruction##32(dst.gp(), src.gp(), amount - 32); \
#define I64_SHIFTOP_I(name, instruction) \
I64_SHIFTOP(name, instruction##v) \
void LiftoffAssembler::emit_i64_##name##i(LiftoffRegister dst, \
LiftoffRegister src, int amount) { \
DCHECK(is_uint6(amount)); \
if (amount < 32) \
instruction(dst.gp(), src.gp(), amount); \
else \
instruction##32(dst.gp(), src.gp(), amount - 32); \
}
I64_SHIFTOP_I(shl, dsll)
......
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