Commit 54c6a307 authored by Leszek Swirski's avatar Leszek Swirski Committed by V8 LUCI CQ

[maglev] Add Float64 compare ops

Same pattern as Int32 compare ops.

Bug: v8:7700
Change-Id: Ia090cb97d6c5c99c6aa719ec5db1a2a8e2156472
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3663340Reviewed-by: 's avatarToon Verwaest <verwaest@chromium.org>
Commit-Queue: Toon Verwaest <verwaest@chromium.org>
Auto-Submit: Leszek Swirski <leszeks@chromium.org>
Cr-Commit-Position: refs/heads/main@{#80723}
parent db24d136
......@@ -685,6 +685,7 @@ MAGLEV_UNIMPLEMENTED_BYTECODE(LdaLookupSlotInsideTypeof)
MAGLEV_UNIMPLEMENTED_BYTECODE(LdaLookupContextSlotInsideTypeof)
MAGLEV_UNIMPLEMENTED_BYTECODE(LdaLookupGlobalSlotInsideTypeof)
MAGLEV_UNIMPLEMENTED_BYTECODE(StaLookupSlot)
void MaglevGraphBuilder::VisitGetNamedProperty() {
// GetNamedProperty <object> <name_index> <slot>
ValueNode* object = LoadRegisterTagged(0);
......
......@@ -167,6 +167,13 @@ class MaglevGraphVerifier {
case Opcode::kFloat64Subtract:
case Opcode::kFloat64Multiply:
case Opcode::kFloat64Divide:
case Opcode::kFloat64Equal:
case Opcode::kFloat64StrictEqual:
case Opcode::kFloat64LessThan:
case Opcode::kFloat64LessThanOrEqual:
case Opcode::kFloat64GreaterThan:
case Opcode::kFloat64GreaterThanOrEqual:
case Opcode::kBranchIfFloat64Compare:
DCHECK_EQ(node->input_count(), 2);
CheckValueInputIs(node, 0, ValueRepresentation::kFloat64);
CheckValueInputIs(node, 1, ValueRepresentation::kFloat64);
......
......@@ -1133,7 +1133,7 @@ void Int32ShiftRightLogical::GenerateCode(MaglevCodeGenState* code_gen_state,
namespace {
constexpr Condition Int32ConditionFor(Operation operation) {
constexpr Condition ConditionFor(Operation operation) {
switch (operation) {
case Operation::kEqual:
case Operation::kStrictEqual:
......@@ -1170,7 +1170,7 @@ void Int32CompareNode<Derived, kOperation>::GenerateCode(
Label is_true, end;
__ cmpl(left, right);
// TODO(leszeks): Investigate using cmov here.
__ j(Int32ConditionFor(kOperation), &is_true);
__ j(ConditionFor(kOperation), &is_true);
// TODO(leszeks): Investigate loading existing materialisations of roots here,
// if available.
__ LoadRoot(result, RootIndex::kFalseValue);
......@@ -1255,6 +1255,52 @@ void Float64Divide::GenerateCode(MaglevCodeGenState* code_gen_state,
__ Divsd(left, right);
}
template <class Derived, Operation kOperation>
void Float64CompareNode<Derived, kOperation>::AllocateVreg(
MaglevVregAllocationState* vreg_state, const ProcessingState& state) {
UseRegister(left_input());
UseRegister(right_input());
DefineAsRegister(vreg_state, this);
}
template <class Derived, Operation kOperation>
void Float64CompareNode<Derived, kOperation>::GenerateCode(
MaglevCodeGenState* code_gen_state, const ProcessingState& state) {
DoubleRegister left = ToDoubleRegister(left_input());
DoubleRegister right = ToDoubleRegister(right_input());
Register result = ToRegister(this->result());
Label is_true, end;
__ Ucomisd(left, right);
// TODO(leszeks): Investigate using cmov here.
__ j(ConditionFor(kOperation), &is_true);
// TODO(leszeks): Investigate loading existing materialisations of roots here,
// if available.
__ LoadRoot(result, RootIndex::kFalseValue);
__ jmp(&end);
{
__ bind(&is_true);
__ LoadRoot(result, RootIndex::kTrueValue);
}
__ bind(&end);
}
#define DEF_OPERATION(Name) \
void Name::AllocateVreg(MaglevVregAllocationState* vreg_state, \
const ProcessingState& state) { \
Base::AllocateVreg(vreg_state, state); \
} \
void Name::GenerateCode(MaglevCodeGenState* code_gen_state, \
const ProcessingState& state) { \
Base::GenerateCode(code_gen_state, state); \
}
DEF_OPERATION(Float64Equal)
DEF_OPERATION(Float64StrictEqual)
DEF_OPERATION(Float64LessThan)
DEF_OPERATION(Float64LessThanOrEqual)
DEF_OPERATION(Float64GreaterThan)
DEF_OPERATION(Float64GreaterThanOrEqual)
#undef DEF_OPERATION
void CheckedSmiUntag::AllocateVreg(MaglevVregAllocationState* vreg_state,
const ProcessingState& state) {
UseRegister(input());
......@@ -1665,10 +1711,43 @@ void BranchIfInt32Compare::GenerateCode(MaglevCodeGenState* code_gen_state,
// over whatever the next block emitted is.
if (if_false() == next_block) {
// Jump over the false block if true, otherwise fall through into it.
__ j(Int32ConditionFor(operation_), if_true()->label());
__ j(ConditionFor(operation_), if_true()->label());
} else {
// Jump to the false block if true.
__ j(NegateCondition(ConditionFor(operation_)), if_false()->label());
// Jump to the true block if it's not the next block.
if (if_true() != next_block) {
__ jmp(if_true()->label());
}
}
}
void BranchIfFloat64Compare::PrintParams(
std::ostream& os, MaglevGraphLabeller* graph_labeller) const {
os << "(" << operation_ << ")";
}
void BranchIfFloat64Compare::AllocateVreg(MaglevVregAllocationState* vreg_state,
const ProcessingState& state) {
UseRegister(left_input());
UseRegister(right_input());
}
void BranchIfFloat64Compare::GenerateCode(MaglevCodeGenState* code_gen_state,
const ProcessingState& state) {
DoubleRegister left = ToDoubleRegister(left_input());
DoubleRegister right = ToDoubleRegister(right_input());
auto* next_block = state.next_block();
__ Ucomisd(left, right);
// We don't have any branch probability information, so try to jump
// over whatever the next block emitted is.
if (if_false() == next_block) {
// Jump over the false block if true, otherwise fall through into it.
__ j(ConditionFor(operation_), if_true()->label());
} else {
// Jump to the false block if true.
__ j(NegateCondition(Int32ConditionFor(operation_)), if_false()->label());
__ j(NegateCondition(ConditionFor(operation_)), if_false()->label());
// Jump to the true block if it's not the next block.
if (if_true() != next_block) {
__ jmp(if_true()->label());
......
......@@ -99,12 +99,12 @@ class CompactInterpreterFrameState;
/*V(Float64Negate) */ \
/*V(Float64Increment)*/ \
/*V(Float64Decrement)*/ \
/*V(Float64Equal)*/ \
/*V(Float64StrictEqual)*/ \
/*V(Float64LessThan)*/ \
/*V(Float64LessThanOrEqual)*/ \
/*V(Float64GreaterThan)*/ \
/*V(Float64GreaterThanOrEqual)*/
V(Float64Equal) \
V(Float64StrictEqual) \
V(Float64LessThan) \
V(Float64LessThanOrEqual) \
V(Float64GreaterThan) \
V(Float64GreaterThanOrEqual)
#define CONSTANT_VALUE_NODE_LIST(V) \
V(Constant) \
......@@ -150,7 +150,8 @@ class CompactInterpreterFrameState;
#define CONDITIONAL_CONTROL_NODE_LIST(V) \
V(BranchIfTrue) \
V(BranchIfToBooleanTrue) \
V(BranchIfInt32Compare)
V(BranchIfInt32Compare) \
V(BranchIfFloat64Compare)
#define UNCONDITIONAL_CONTROL_NODE_LIST(V) \
V(Jump) \
......@@ -1269,6 +1270,47 @@ DEF_FLOAT64_BINARY_NODE(Divide)
// DEF_FLOAT64_BINARY_NODE(GreaterThanOrEqual)
#undef DEF_FLOAT64_BINARY_NODE
template <class Derived, Operation kOperation>
class Float64CompareNode : public FixedInputValueNodeT<2, Derived> {
using Base = FixedInputValueNodeT<2, Derived>;
public:
static constexpr int kLeftIndex = 0;
static constexpr int kRightIndex = 1;
Input& left_input() { return Node::input(kLeftIndex); }
Input& right_input() { return Node::input(kRightIndex); }
protected:
explicit Float64CompareNode(uint32_t bitfield) : Base(bitfield) {}
void AllocateVreg(MaglevVregAllocationState*, const ProcessingState&);
void GenerateCode(MaglevCodeGenState*, const ProcessingState&);
void PrintParams(std::ostream&, MaglevGraphLabeller*) const {}
};
#define DEF_OPERATION_NODE(Name, Super, OpName) \
class Name : public Super<Name, Operation::k##OpName> { \
using Base = Super<Name, Operation::k##OpName>; \
\
public: \
explicit Name(uint32_t bitfield) : Base(bitfield) {} \
void AllocateVreg(MaglevVregAllocationState*, const ProcessingState&); \
void GenerateCode(MaglevCodeGenState*, const ProcessingState&); \
void PrintParams(std::ostream&, MaglevGraphLabeller*) const {} \
};
#define DEF_FLOAT64_COMPARE_NODE(Name) \
DEF_OPERATION_NODE(Float64##Name, Float64CompareNode, Name)
DEF_FLOAT64_COMPARE_NODE(Equal)
DEF_FLOAT64_COMPARE_NODE(StrictEqual)
DEF_FLOAT64_COMPARE_NODE(LessThan)
DEF_FLOAT64_COMPARE_NODE(LessThanOrEqual)
DEF_FLOAT64_COMPARE_NODE(GreaterThan)
DEF_FLOAT64_COMPARE_NODE(GreaterThanOrEqual)
#undef DEF_FLOAT64_COMPARE_NODE
#undef DEF_OPERATION_NODE
class CheckedSmiTag : public FixedInputValueNodeT<1, CheckedSmiTag> {
using Base = FixedInputValueNodeT<1, CheckedSmiTag>;
......@@ -2283,6 +2325,29 @@ class BranchIfInt32Compare
Operation operation_;
};
class BranchIfFloat64Compare
: public ConditionalControlNodeT<2, BranchIfFloat64Compare> {
using Base = ConditionalControlNodeT<2, BranchIfFloat64Compare>;
public:
static constexpr int kLeftIndex = 0;
static constexpr int kRightIndex = 1;
Input& left_input() { return NodeBase::input(kLeftIndex); }
Input& right_input() { return NodeBase::input(kRightIndex); }
explicit BranchIfFloat64Compare(uint32_t bitfield, Operation operation,
BasicBlockRef* if_true_refs,
BasicBlockRef* if_false_refs)
: Base(bitfield, if_true_refs, if_false_refs), operation_(operation) {}
void AllocateVreg(MaglevVregAllocationState*, const ProcessingState&);
void GenerateCode(MaglevCodeGenState*, const ProcessingState&);
void PrintParams(std::ostream&, MaglevGraphLabeller*) const;
private:
Operation operation_;
};
} // namespace maglev
} // namespace internal
} // namespace v8
......
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