Commit 52f2ceb0 authored by balazs.kilvady's avatar balazs.kilvady Committed by Commit bot

MIPS: Fix '[turbofan] Prevent storing signalling NaNs into holey double arrays.'

Port 6470ddad

On MIPS different signaling NaN values must be used for hardware and simulator targets, even at snapshot generation when always simulator is used.

Original commit message:
This introduces SilenceNaN operator, which makes sure that we only
store quiet NaNs into holey arrays. We omit the NaN silencing code
at instruction selection time if the input is an operation that
cannot possibly produce signalling NaNs.

BUG=

Review-Url: https://codereview.chromium.org/2171303002
Cr-Commit-Position: refs/heads/master@{#38030}
parent 3361b7fd
......@@ -364,12 +364,15 @@
],
'cflags': ['-march=i586'],
}], # v8_target_arch=="x87"
['(v8_target_arch=="mips" or v8_target_arch=="mipsel" \
or v8_target_arch=="mips64" or v8_target_arch=="mips64el") \
and v8_target_arch==target_arch', {
['v8_target_arch=="mips" or v8_target_arch=="mipsel" \
or v8_target_arch=="mips64" or v8_target_arch=="mips64el"', {
'target_conditions': [
['_toolset=="target"', {
'conditions': [
['v8_target_arch==target_arch', {
# Target built with a Mips CXX compiler.
'conditions': [
],
'variables': {
'ldso_path%': '<!(/bin/echo -n $LDSO_PATH)',
'ld_r_path%': '<!(/bin/echo -n $LD_R_PATH)',
......@@ -384,9 +387,27 @@
[ 'clang==1', {
'cflags': ['-integrated-as'],
}],
['OS!="mac"', {
'defines': ['_MIPS_TARGET_HW',],
}, {
'defines': ['_MIPS_TARGET_SIMULATOR',],
}],
],
}, {
'defines': ['_MIPS_TARGET_SIMULATOR',],
}],
],
}], #'_toolset=="target"
['_toolset=="host"', {
'conditions': [
['v8_target_arch==target_arch and OS!="mac"', {
'defines': ['_MIPS_TARGET_HW',],
}, {
'defines': ['_MIPS_TARGET_SIMULATOR',],
}],
],
}], #'_toolset=="host"
],
}],
['v8_target_arch=="mips"', {
'defines': [
......
......@@ -1335,19 +1335,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kMipsFloat64InsertHighWord32:
__ FmoveHigh(i.OutputDoubleRegister(), i.InputRegister(1));
break;
case kMipsFloat64SilenceNaN: {
FPURegister value = i.InputDoubleRegister(0);
FPURegister result = i.OutputDoubleRegister();
Register scratch0 = i.TempRegister(0);
Label is_nan, not_nan;
__ BranchF(NULL, &is_nan, eq, value, value);
__ Branch(&not_nan);
__ bind(&is_nan);
__ LoadRoot(scratch0, Heap::kNanValueRootIndex);
__ ldc1(result, FieldMemOperand(scratch0, HeapNumber::kValueOffset));
__ bind(&not_nan);
case kMipsFloat64SilenceNaN:
__ FPUCanonicalizeNaN(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
}
// ... more basic instructions ...
......
......@@ -843,8 +843,10 @@ enum ScopeType {
// Use mips sNaN which is a not used qNaN in x87 port as sNaN to workaround this
// issue
// for some test cases.
#if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6)) || \
(V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6)) || \
#if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6) && \
(!defined(USE_SIMULATOR) || !defined(_MIPS_TARGET_SIMULATOR))) || \
(V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6) && \
(!defined(USE_SIMULATOR) || !defined(_MIPS_TARGET_SIMULATOR))) || \
(V8_TARGET_ARCH_X87)
const uint32_t kHoleNanUpper32 = 0xFFFF7FFF;
const uint32_t kHoleNanLower32 = 0xFFFF7FFF;
......
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