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Commit 50fb3e03 authored by Milad Fa's avatar Milad Fa Committed by Commit Bot
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PPC/s390: Reland "[wasm-simd] Merge all any_true to v128.any_true" 

Port 6d3a53e7

Original Commit Message:

    This is a reland of commit 9c09c227.

    The fix for gc stress failure is merged: https://crrev.com/c/2656857.

    Original change's description:

    > Bug: v8:11331
    > Change-Id: Ie394ec841a1a1c4030c4f589eac2cee8a6a2a1f9
    > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2639033
    > Reviewed-by: Georg Neis <neis@chromium.org>
    > Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
    > Commit-Queue: Zhi An Ng <zhin@chromium.org>
    > Cr-Commit-Position: refs/heads/master@{#72304}

R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N

Change-Id: I68991b81c18e06714d272f019dab7994419692bb
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2665894Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#72467}
parent 9fd2c27f
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Showing with 12 additions and 51 deletions
src/compiler/backend/ppc/code-generator-ppc.cc
View file @ 50fb3e03
......@@ -3033,10 +3033,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ vsububm(i.OutputSimd128Register(), tempFPReg1, kScratchSimd128Reg);
break;
}
case kPPC_V64x2AnyTrue:
case kPPC_V32x4AnyTrue:
case kPPC_V16x8AnyTrue:
case kPPC_V8x16AnyTrue: {
case kPPC_V128AnyTrue: {
Simd128Register src = i.InputSimd128Register(0);
Register dst = i.OutputRegister();
constexpr int bit_number = 24;
......
src/compiler/backend/ppc/instruction-codes-ppc.h
View file @ 50fb3e03
......@@ -376,14 +376,11 @@ namespace compiler {
V(PPC_I8x16Swizzle) \
V(PPC_I8x16BitMask) \
V(PPC_I8x16SignSelect) \
V(PPC_V64x2AnyTrue) \
V(PPC_V32x4AnyTrue) \
V(PPC_V16x8AnyTrue) \
V(PPC_V8x16AnyTrue) \
V(PPC_V64x2AllTrue) \
V(PPC_V32x4AllTrue) \
V(PPC_V16x8AllTrue) \
V(PPC_V8x16AllTrue) \
V(PPC_V128AnyTrue) \
V(PPC_S128And) \
V(PPC_S128Or) \
V(PPC_S128Xor) \
......
src/compiler/backend/ppc/instruction-scheduler-ppc.cc
View file @ 50fb3e03
......@@ -299,14 +299,11 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_I8x16Swizzle:
case kPPC_I8x16BitMask:
case kPPC_I8x16SignSelect:
case kPPC_V64x2AnyTrue:
case kPPC_V32x4AnyTrue:
case kPPC_V16x8AnyTrue:
case kPPC_V8x16AnyTrue:
case kPPC_V64x2AllTrue:
case kPPC_V32x4AllTrue:
case kPPC_V16x8AllTrue:
case kPPC_V8x16AllTrue:
case kPPC_V128AnyTrue:
case kPPC_S128And:
case kPPC_S128Or:
case kPPC_S128Xor:
......
src/compiler/backend/ppc/instruction-selector-ppc.cc
View file @ 50fb3e03
......@@ -2297,9 +2297,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
V(I8x16ShrU)
#define SIMD_BOOL_LIST(V) \
V(V32x4AnyTrue) \
V(V16x8AnyTrue) \
V(V8x16AnyTrue) \
V(V128AnyTrue) \
V(V32x4AllTrue) \
V(V16x8AllTrue) \
V(V8x16AllTrue)
......
src/compiler/backend/s390/code-generator-s390.cc
View file @ 50fb3e03
......@@ -3536,9 +3536,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break;
}
// vector boolean unops
case kS390_V32x4AnyTrue:
case kS390_V16x8AnyTrue:
case kS390_V8x16AnyTrue: {
case kS390_V128AnyTrue: {
Simd128Register src = i.InputSimd128Register(0);
Register dst = i.OutputRegister();
Register temp = i.TempRegister(0);
......
src/compiler/backend/s390/instruction-codes-s390.h
View file @ 50fb3e03
......@@ -377,12 +377,10 @@ namespace compiler {
V(S390_I8x16Shuffle) \
V(S390_I8x16Swizzle) \
V(S390_I8x16SignSelect) \
V(S390_V32x4AnyTrue) \
V(S390_V16x8AnyTrue) \
V(S390_V8x16AnyTrue) \
V(S390_V32x4AllTrue) \
V(S390_V16x8AllTrue) \
V(S390_V8x16AllTrue) \
V(S390_V128AnyTrue) \
V(S390_S128And) \
V(S390_S128Or) \
V(S390_S128Xor) \
......
src/compiler/backend/s390/instruction-scheduler-s390.cc
View file @ 50fb3e03
......@@ -324,12 +324,10 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I8x16Shuffle:
case kS390_I8x16Swizzle:
case kS390_I8x16SignSelect:
case kS390_V32x4AnyTrue:
case kS390_V16x8AnyTrue:
case kS390_V8x16AnyTrue:
case kS390_V32x4AllTrue:
case kS390_V16x8AllTrue:
case kS390_V8x16AllTrue:
case kS390_V128AnyTrue:
case kS390_S128And:
case kS390_S128Or:
case kS390_S128Xor:
......
src/compiler/backend/s390/instruction-selector-s390.cc
View file @ 50fb3e03
......@@ -2550,9 +2550,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I8x16ShrU)
#define SIMD_BOOL_LIST(V) \
V(V32x4AnyTrue) \
V(V16x8AnyTrue) \
V(V8x16AnyTrue) \
V(V128AnyTrue) \
V(V32x4AllTrue) \
V(V16x8AllTrue) \
V(V8x16AllTrue)
......
src/wasm/baseline/ppc/liftoff-assembler-ppc.h
View file @ 50fb3e03
......@@ -939,11 +939,6 @@ void LiftoffAssembler::emit_i32x4_neg(LiftoffRegister dst,
bailout(kUnsupportedArchitecture, "emit_i32x4neg");
}
void LiftoffAssembler::emit_v32x4_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v32x4_anytrue");
}
void LiftoffAssembler::emit_v32x4_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v32x4_alltrue");
......@@ -1065,11 +1060,6 @@ void LiftoffAssembler::emit_i16x8_neg(LiftoffRegister dst,
bailout(kUnsupportedArchitecture, "emit_i16x8neg");
}
void LiftoffAssembler::emit_v16x8_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v16x8_anytrue");
}
void LiftoffAssembler::emit_v16x8_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v16x8_alltrue");
......@@ -1255,8 +1245,8 @@ void LiftoffAssembler::emit_i8x16_neg(LiftoffRegister dst,
bailout(kUnsupportedArchitecture, "emit_i8x16neg");
}
void LiftoffAssembler::emit_v8x16_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
void LiftoffAssembler::emit_v128_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v8x16_anytrue");
}
......
src/wasm/baseline/s390/liftoff-assembler-s390.h
View file @ 50fb3e03
......@@ -1218,11 +1218,6 @@ void LiftoffAssembler::emit_i32x4_neg(LiftoffRegister dst,
bailout(kUnsupportedArchitecture, "emit_i32x4neg");
}
void LiftoffAssembler::emit_v32x4_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v32x4_anytrue");
}
void LiftoffAssembler::emit_v32x4_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v32x4_alltrue");
......@@ -1344,11 +1339,6 @@ void LiftoffAssembler::emit_i16x8_neg(LiftoffRegister dst,
bailout(kUnsupportedArchitecture, "emit_i16x8neg");
}
void LiftoffAssembler::emit_v16x8_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v16x8_anytrue");
}
void LiftoffAssembler::emit_v16x8_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v16x8_alltrue");
......@@ -1540,8 +1530,8 @@ void LiftoffAssembler::emit_i8x16_neg(LiftoffRegister dst,
bailout(kUnsupportedArchitecture, "emit_i8x16neg");
}
void LiftoffAssembler::emit_v8x16_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
void LiftoffAssembler::emit_v128_anytrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v8x16_anytrue");
}
......
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